H01L2224/33519

SEMICONDCUTOR DEVICE AND SEMICONDCUTOR PACKAGE

A semiconductor package includes a die, a passivation layer, a plurality of first electrical conductive vias, a plurality of second electrical conductive vias, a plurality of thermal conductive vias and a connecting pattern. The die includes a plurality of first pads and a plurality of second pads. The passivation layer is disposed on the die. The first electrical conductive vias and the second electrical conductive vias extend through the passivation layer and contact the first pads and the second pads respectively. The thermal conductive vias are disposed on the passivation layer. Each of the thermal conductive vias is spaced apart from the first and second electrical conductive vias. The connecting pattern is disposed on the passivation layer and connects the first electrical conductive vias and the thermal conductive vias. The thermal conductive vias are connected to the first pads through the connecting pattern and the first electrical conductive vias.

Warpage control in package-on-package structures

A package includes a bottom substrate and a bottom die over and bonded to the bottom substrate. A metal-particle-containing compound material is overlying a top surface of the bottom die, wherein the metal-particle-containing compound material comprises metal particles. A molding material molds at least a lower part of the bottom die therein, wherein the molding material is overlying the bottom substrate.

3DIC packaging with hot spot thermal management features

A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.

Package-on-package semiconductor device

Some embodiments relate to a semiconductor device. The semiconductor device includes a substrate. A first die is coupled beneath a lower surface of the substrate. A second die is coupled beneath the lower surface of the substrate and is disposed over the first die. A thermal contact pad is arranged beneath a lower surface of the second die and an upper surface of the first die. The thermal contact pad thermally isolates the first die from the second die.

MULTILAYER BOARD AND ELECTRONIC DEVICE
20180233429 · 2018-08-16 ·

A multilayer board includes a base including insulating layers stacked in a stacking direction, and a mounting surface at an end of the base in a first direction along the stacking direction, an electronic component inside the base, and a first heat dissipator extending through at least one of the insulating layers from a surface of the electronic component located at an end of the electronic component in the first direction to the mounting surface. When a section of the first heat dissipator is defined as a first section, and a section of the first heat dissipator located farther in a second direction along the layer stacking direction than the first section is defined as a second section, there is a combination of a first section and a second section in which the second section extends farther outward than the first section when viewed from the layer stacking direction.

Warpage Control in Package-on-Package Structures

A package includes a bottom substrate and a bottom die over and bonded to the bottom substrate. A metal-particle-containing compound material is overlying a top surface of the bottom die, wherein the metal-particle-containing compound material comprises metal particles. A molding material molds at least a lower part of the bottom die therein, wherein the molding material is overlying the bottom substrate.

LOW THERMAL RESISTANCE HANGING DIE PACKAGE

Embodiments herein generally relate to the field of package assembly to facilitate thermal conductivity. A package may have a hanging die, and attach to a printed circuit board (PCB). The package may have an active side plane and an inactive side plane opposite the first active side plane. The package may also have a ball grid array (BGA) matrix having a height determined by a distance of a furthest point of the BGA matrix from the active side plane of the package. The package may have a hanging die attached to the active side plane of the package, the hanging die having a z-height greater than the BGA matrix height. When package is attached to the PCB, the hanging die may fit into an area on the PCB that is recessed or has been cut away, and a thermal conductive material may connect the hanging die and the PCB.

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATION THEREOF

A semiconductor device and a method of manufacture thereof are provided. The method for manufacturing the semiconductor device includes forming a first dielectric layer on a substrate. Next, forming a first dummy metal layer on the first dielectric layer. Then, forming a second dielectric layer over the first dummy metal layer. Furthermore, forming an opening in the second dielectric layer and the first dummy metal layer. Then, forming a dummy via in the opening, wherein the dummy via extending through the second dielectric layer and at least partially through the first dummy metal layer. Finally, forming a second dummy metal layer on the second dielectric layer and contact the dummy via.

ELECTRONIC PACKAGE AND SUBSTRATE STRUCTURE THEREOF

An electronic package and a substrate structure thereof are provided, in which an electronic element and a flow stopper surrounding the electronic element are disposed on a substrate body of the substrate structure, and a heat dissipation structure is bonded on the electronic element via a heat dissipation material, so that the flow stopper limits an overflow range of the heat dissipation material to prevent the heat dissipation material from contaminating a circuit layer on the substrate body.

SEMICONDUCTOR DEVICE

A semiconductor device includes a substrate, a lid, a semiconductor package and a thermal conductive bonding layer. The lid is attached to the substrate, wherein the lid has a first cavity and a second cavity extending from the first cavity to inside of the lid. The semiconductor package is disposed in the first cavity, below the second cavity and electrically connected to the substrate. The semiconductor package includes at least one semiconductor die, and the second cavity is disposed adjacent to periphery of the at least one semiconductor die in a top view of the semiconductor device. The thermal conductive bonding layer attaches the lid to the semiconductor package and extends into at least a portion of the second cavity.