Patent classifications
H01L2224/33519
Semiconductor structure and method of forming the same
A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.
SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL DISSIPATION AND METHOD FOR MAKING THE SAME
A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of 50 W/mK.
Warpage control in package-on-package structures
A package includes a bottom substrate and a bottom die over and bonded to the bottom substrate. A metal-particle-containing compound material is overlying a top surface of the bottom die, wherein the metal-particle-containing compound material comprises metal particles. A molding material molds at least a lower part of the bottom die therein, wherein the molding material is overlying the bottom substrate.
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD FOR THE SAME
A semiconductor package including a substrate; a semiconductor chip on the substrate and electrically connected to the substrate; a molding material on the substrate that molds the semiconductor chip; a thermal conductive adhesive on the semiconductor chip and the molding material; and a thermal conductive layer on the thermal conductive adhesive. A first surface of the thermal conductive layer faces the thermal conductive adhesive. A second surface of the thermal conductive layer which is opposite the first surface of the thermal conductive layer has a higher surface roughness value than the first surface.
SEMICONDUCTOR PACKAGE WITH THERMAL CONDUCTIVE STRUCTURE AND THE METHODS OF FORMING THE SAME
A method includes depositing a first metal layer on a package component, wherein the package component comprises a first device die, forming a dielectric layer on the package component, and plating a metal thermal interface material on the first metal layer. The dielectric layer includes portions on opposing sides of the metal thermal interface material. A heat sink is bonded on the metal thermal interface material. The heat sink includes a second metal layer physically joined to the metal thermal interface material.