According to one embodiment, a semiconductor device includes a semiconductor chip, first and second conductive members, a first connection member, and a resin portion. The first conductive member includes first and second portions. The second portion is electrically connected to the semiconductor chip. A direction from the semiconductor chip toward the second portion is aligned with a first direction. A direction from the second portion toward the first portion is aligned with a second direction crossing the first direction. The second conductive member includes a third portion. The first connection member is provided between the first and third portion. The first connection member is conductive. The resin portion includes a first partial region. The first partial region is provided around the first and third portions, and the first connection member. The first portion has a first surface opposing the first connection member and including a recess and a protrusion.

A lead frame structure for connecting a semiconductor chip to a connection target includes a conductive member electrically connecting the semiconductor chip and the connection target. The conductive member includes a first bonding part having a main surface, disposed on one side of the conductive member and being bonded to the semiconductor chip, a second bonding part having a main surface, being disposed on another side of the conductive member that is spaced from the one side in one direction and being bonded to the connection target, and a joining part having a wall section intersecting the main surface of the first bonding part and the main surface of the second bonding part, the wall section joining a portion of the first bonding part to a portion of the second bonding part.

An object is to provide a power module in which adhesion of a sealing resin is sufficient and which is highly reliable. The power module includes: an insulative board in which a pattern of a conductor layer is formed on a ceramic plate; power semiconductor elements placed on the insulative board; lead frames each in a plate shape connecting from electrodes of the power semiconductor elements to screw-fastening terminal portions; and a sealing resin portion that seals connection portions between the power semiconductor elements and the lead frames, and regions around the connection portions; wherein, in the lead frames, opening portions are formed at positions where each of the lead frames at least partly overlaps, in planar view, with a portion of the insulative board on which the conductor layer is not formed.

A semiconductor device is disclosed. In one example, the semiconductor device comprises a first semiconductor die comprising a first surface, a second surface opposite to the first surface, and a contact pad disposed on the first surface, a further contact pad spaced apart from the semiconductor die, a clip comprising a first layer of a first metallic material and a second layer of a second metallic material different from the first metallic material, wherein the first layer of the clip is connected with the contact pad, and the second layer of the clip is connected with the further contact pad.

A packaged electronic device includes a substrate comprising a die pad and a lead spaced apart from the die. An electronic device is attached to the die pad top side. A conductive clip is connected to the substrate and the electronic device, and the conductive clip comprises a plate portion attached to the device top side with a conductive material, a clip connecting portion connected to the plate portion and the lead, and channels disposed to extend inward from a lower side of the plate portion above the device top side. The conductive material is disposed within the channels. In another example, the plate portion comprises a lower side having a first sloped profile in a first cross-sectional view such that an outer section of the first sloped profile towards a first edge portion of the plate portion is spaced away from the electronic device further than an inner section of the first sloped profile towards a central portion of the plate portion. Other examples and related methods are also disclosed herein.

In general aspect, a semiconductor device package can include a substrate and a semiconductor die disposed on and coupled with the substrate. The semiconductor device package can further include a leadframe having an indentation defined therein, at least a portion of the indentation being disposed on and coupled with the semiconductor die via a conductive adhesive.

A semiconductor package includes a plurality of metal leads and a semiconductor die attached to the plurality of metal leads by an interconnect. A surface of the plurality of metal leads, a metallized surface of the semiconductor die, and/or a surface of the interconnect comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS. One or more of the surfaces which comprise Cu and have a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS also includes micropores having a diameter in a range of 1 m to 10 m. A method of manufacturing a metal surface with such micropores also is described.

A semiconductor device, including a conductive plate having a front surface that includes a plurality of bonding regions and a plurality of non-bonding regions in peripheries of the bonding regions, a plurality of semiconductor elements mounted on the conductive plate in the bonding regions, and a resin encapsulating therein at least the plurality of semiconductor elements and the front surface of the conductive plate. The conductive plate has, at the front surface thereof in the non-bonding regions, a plurality of holes.

Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.

Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.