A semiconductor device according to the present embodiment includes a substrate and a semiconductor chip. The substrate has a first face and a plurality of conductive connection parts provided on the first face. The semiconductor chip has a second face that faces the first face and a plurality of connection bumps provided on the second face and electrically connected to the plurality of conductive connection parts. The conductive connection part arranged in a chip outer peripheral region of a chip region on the first face where the semiconductor chip is arranged is different in thickness from the conductive connection part arranged in a chip central region of the chip region.

A semiconductor device includes a semiconductor element, a support member, and a bonding layer interposed between the semiconductor element and the support member, wherein the bonding layer contains an alloy of first metal and second metal.

A semiconductor device includes: a semiconductor element; a support member; a bonding layer interposed between the semiconductor element and the support member; and a sealing resin that covers the semiconductor element and at least a portion of the support member, wherein the bonding layer is a layer in which a layer containing first metal and a layer containing second metal are integrated without going through a molten state, and wherein the support member includes a first surface facing in a thickness direction and facing a side on which the semiconductor element is located, and a plurality of first recesses located outside the bonding layer and recessed from the first surface when viewed along the thickness direction.

A semiconductor device substrate assembly may include a first substrate, comprising: a first insulator plate; and a first patterned metal layer, disposed on the first insulator plate, wherein the first insulator plate comprises a first material and a first thickness. The assembly may include a second substrate, comprising: a second insulator plate; and a second patterned metal layer, disposed on the second insulator plate, wherein the second insulator plate comprises the first material and the first thickness. The assembly may also include a third substrate, disposed between the first substrate and the second substrate, comprising: a third insulator plate; and a third patterned metal layer, disposed on the third insulator plate, wherein the third insulator plate comprises a second material and a second thickness, wherein at least one of the second material and the second thickness differs from the first material and the first thickness, respectively.

A first conductive pattern (13) is provided on an upper surface of the submount (7). A GND pattern (9) is provided on a lower surface of the submount (7). A lower surface electrode (21) of a capacitor (3) is bonded to the first conductive pattern (13) with solder (22). An upper surface electrode (23) of the capacitor (3) is connected to a light emitting device (2). A terminating resistor (4) is connected to the first conductive pattern (13). The first conductive pattern (13) has a protruding portion (25) which protrudes outside from the capacitor (3) in planar view. A width of the protruding portion (25) is narrower than a width of the capacitor (3).

A semiconductor device substrate assembly may include a first substrate, comprising: a first insulator plate; and a first patterned metal layer, disposed on the first insulator plate, wherein the first insulator plate comprises a first material and a first thickness. The assembly may include a second substrate, comprising: a second insulator plate; and a second patterned metal layer, disposed on the second insulator plate, wherein the second insulator plate comprises the first material and the first thickness. The assembly may also include a third substrate, disposed between the first substrate and the second substrate, comprising: a third insulator plate; and a third patterned metal layer, disposed on the third insulator plate, wherein the third insulator plate comprises a second material and a second thickness, wherein at least one of the second material and the second thickness differs from the first material and the first thickness, respectively.

A display substrate, including: a base substrate including at least a side edge and a display area; a plurality of pixel units disposed in the display area, a second pixel unit is located on a side of a first pixel unit close to the side edge, edges of the second pixel unit include the side edge, a third pixel unit is located between the first pixel unit and the second pixel unit, and the third pixel unit is adjacent to the second pixel unit; and a plurality of light emitting diode chips disposed on the base substrate a first light emitting diode chip is located in the first pixel unit, a part of a second light emitting diode chip is located in the second pixel unit, and the other part of the second light emitting diode chip is located in the third pixel unit.

Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a molding compound disposed around the integrated circuit die, and an interconnect structure disposed over the integrated circuit die and the molding compound. The molding compound is thicker than the integrated circuit die.

Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a molding compound disposed around the integrated circuit die, and an interconnect structure disposed over the integrated circuit die and the molding compound. The molding compound is thicker than the integrated circuit die.

A semiconductor device according to one embodiment includes: a semiconductor chip having a transistor and a drain pad provided on a board; a capacitor having an upper electrode and a lower electrode interposing a dielectric; a pad; and an empty pad provided on the board of the semiconductor chip. The semiconductor device further includes: a first wire connecting the pad and the drain pad of the semiconductor chip to each other; a second wire connecting the empty pad and the upper electrode of the capacitor to each other; and a third wire connecting the pad and the empty pad to each other.