A semiconductor device includes: a conductive base substrate; a semiconductor chip mounted on the base substrate and having a signal pad; a frame configured to surround the semiconductor chip, to be mounted on the base substrate, and to include a step having an inner first upper surface and an outer second upper surface higher than the first upper surface in a plan view, wherein a first conductor pattern provided on the first upper surface is electrically connected to the base substrate; a capacitive component mounted on the first conductor pattern; a signal terminal mounted on the second upper surface of the frame; a first bonding wire configured to electrically connect the signal pad and an upper surface of the capacitive component; and a second bonding wire configured to electrically connect the upper surface of the capacitive component and the signal terminal.

A semiconductor device includes a substrate, a semiconductor chip, a resin, and a terminal. The substrate spreads along a first surface. The semiconductor chip is provided above the substrate in a first direction. The resin covers the semiconductor chip. The terminal is provided below the substrate in the first direction. The resin includes a first portion and a second portion. A height of the first portion in the first direction is higher than a height of the second portion in the first direction. An edge of the second portion in a second direction along the first surface is a part of an edge of the resin in the second direction.

A semiconductor package including a package substrate including first and second bonding pads, third bonding pads spaced apart from the first bonding pads, and fourth bonding pads spaced apart from the second bonding pads; a first chip stack including first chips stacked on the package substrate, each first chip including first signal pads and first power/ground pads alternately arranged; a second chip stack including second chips stacked on the first chip stack, each second chip including second signal pads and second power/ground pads alternately arranged; first lower wires that connect the first signal pads to the first bonding pads; second lower wires that connect the first power/ground pads to the second bonding pads; first upper wires that connect the second signal pads of the second chips to the third bonding pads; and second upper wires that connect the second power/ground pads of the second chips to the fourth bonding pads.

In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.

Disclosed is an LED assembly having an omnidirectional light field. The LED assembly has a transparent substrate with first and second surfaces facing to opposite orientations respectively. LED chips are mounted on the first surface and are electrically interconnected by a circuit. A transparent capsule with a phosphor dispersed therein is formed on the first surface and substantially encloses the circuit and the LED chips. First and second electrode plates are formed on the first or second surface, and electrically connected to the LED chips.

A semiconductor device module. The semiconductor device module may include a first substrate; and a semiconductor die assembly, disposed on the first substrate. The semiconductor die assembly may include a first semiconductor die, bonded to the first substrate; a second semiconductor die, disposed over the first semiconductor die; and an electrical connector, disposed between the first semiconductor die and the second semiconductor die, wherein the semiconductor die assembly comprises an insulated gate bipolar transistor (IGBT) die and a freewheeling diode die.

Example embodiments relate to lead frame based molded radio frequency packages. One example package includes a substrate. The package also includes a first electrical component arranged on the substrate. Additionally, the package includes a second electrical component. Further, the package includes a plurality of leads that are arranged spaced apart from the substrate and fixed in position relative thereto by a solidified molding compound. The leads were part of a lead frame prior to separating the package from the lead frame. The substrate was physically and electrically connected to the lead frame using a plurality of spaced apart connecting members prior to separating the package from the lead frame. During the separating of the package from the lead frame, each connecting member was divided into a first connecting member part and a second connecting member part. In addition, the package includes a frame part.

A power module includes an insulating substrate, a case member, a power semiconductor element, a base member, a sealing member, and an adhesive member. The insulating substrate has a first surface and a second surface opposite to the first surface. The case member surrounds the insulating substrate when viewed in a direction perpendicular to the first surface. The power semiconductor element faces the first surface. The base member faces the second surface. The sealing member seals the power semiconductor element and the insulating substrate and is in contact with the case member. The adhesive member fixes the base member and the case member, and surrounds the insulating substrate when viewed in the direction perpendicular to the first surface.

Subject matter disclosed herein may relate to semiconductor devices, and may more particularly relate to power semiconductor packages, for example.

A semiconductor device includes a baseplate and a case which includes an external wall surrounding an internal space and a dividing wall extending in a first direction and separating the space into compartments. The dividing wall has a lower end fixed to the principal surface and includes, on a sidewall, a terrace positioned further away from the principal surface than the lower end and hanging out toward the space compared to the lower end in a second direction parallel to the principal surface and perpendicular to the first direction. A terminal's bonding part, to which a wire is bonded, is disposed on the terrace. A ratio of the wire's diameter to the bonding part's width in the first direction is set to ≤0.15, which prevents a situation where bonding power is not sufficiently applied to the bonding part during ultrasonic bonding of the wire, thus increasing the bonding strength.