A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

A method for forming a contact connection between a chip-and a conductor material formed on a non-conductive substrate, the chip being arranged on the substrate or on another conductor material track, a sinter paste consisting of at least 40% silver or copper being applied to respective chip contact surfaces of the chip and the conductor material track, a contact conductor being immersed in the sinter paste on the chip contact surface and in the sinter paste on the conductor material track, and the contact connection being formed by sintering the sinter paste by means of laser energy.

A semiconductor device includes a shielding wire formed across a semiconductor die and an auxiliary wire supporting the shielding wire, thereby reducing the size of a package while shielding the electromagnetic interference generated from the semiconductor die. In one embodiment, the semiconductor device includes a substrate having at least one circuit device mounted thereon, a semiconductor die spaced apart from the circuit device and mounted on the substrate, a shielding wire spaced apart from the semiconductor die and formed across the semiconductor die, and an auxiliary wire supporting the shielding wire under the shielding wire and formed to be perpendicular to the shielding wire. In another embodiment, a bump structure is used to support the shielding wire. In a further embodiment, an auxiliary wire includes a bump structure portion and wire portion and both the bump structure portion and the wire portion are used to support the shielding wire.

A semiconductor device includes a shielding wire formed across a semiconductor die and an auxiliary wire supporting the shielding wire, thereby reducing the size of a package while shielding the electromagnetic interference generated from the semiconductor die. In one embodiment, the semiconductor device includes a substrate having at least one circuit device mounted thereon, a semiconductor die spaced apart from the circuit device and mounted on the substrate, a shielding wire spaced apart from the semiconductor die and formed across the semiconductor die, and an auxiliary wire supporting the shielding wire under the shielding wire and formed to be perpendicular to the shielding wire. In another embodiment, a bump structure is used to support the shielding wire. In a further embodiment, an auxiliary wire includes a bump structure portion and wire portion and both the bump structure portion and the wire portion are used to support the shielding wire.

A semiconductor device includes at least one member that is partially sealed by a sealing material and has a part of thereof being exposed from the sealing material, a reversible temperature indicating material, and an irreversible temperature indicating material. Each of the reversible temperature indicating material and the irreversible temperature indicating material is provided on a surface of any one of the at least one member.

Methods and apparatus for providing an interconnection including a stack of wirebond balls having a selected impedance. The wirebond balls may have a size, which may comprise a radius, configured for the selected impedance. The stack may comprise a number of wirebond balls configured for the selected impedance and/or may comprise a material selected for the selected impedance. In embodiments, the selected impedance is primarily resistive (e.g., 50 Ohms), such that the overall reactance is minimized.

Methods and apparatus for providing an interconnection including a stack of wirebond balls having a selected impedance. The wirebond balls may have a size, which may comprise a radius, configured for the selected impedance. The stack may comprise a number of wirebond balls configured for the selected impedance and/or may comprise a material selected for the selected impedance. In embodiments, the selected impedance is primarily resistive (e.g., 50 Ohms), such that the overall reactance is minimized.

A method including stacking a number of silicon dice such that one or more edges of the dice are in vertical alignment, where the one or more edges include a number of connection pads. The method also includes positioning a connecting wire on a substantially perpendicular axis to the one or more edges. The connecting wire includes a number of solder blocks formed thereon. The solder blocks are spaced at intervals associated with a distance between a first set of aligned connection pads on the dice. The connecting wire is positioned such that the solder blocks are in contact with the first set of aligned connection pads. The method also includes applying heat to cause the solder blocks to reflow and physically and electrically couple the connecting wire to the connection pads.

Some embodiments include apparatuses and methods of fabricating the apparatuses. One of the apparatuses includes a substrate of a semiconductor die; a memory cell portion located over a first portion of the substrate; a conductive pad portion located over a second portion of the substrate and outside the memory cell portion; and a sensor circuit including a portion located over the second portion of the substrate and under the conductive pad portion. The conductive pad portion includes conductive pads. Each of the conductive pads is part of a respective electrical path coupled to a conductive contact of a base outside the substrate.