A light source device includes a substrate, an electrode layer and an annular step-like surrounding frame both disposed on the substrate, a light emitter and a light detector both spaced apart from each other and mounted on the electrode layer in the surrounding frame, and a light permeable member disposed on the surrounding frame. The surrounding frame includes an upper tread arranged away from the substrate, an upper riser connected to an inner edge of the upper tread, a lower tread arranged at an inner side of the upper riser, and a lower riser connected to an inner edge of the lower tread and arranged away from the upper tread. The surrounding frame has a notch recessed in the lower tread and the lower riser for spatially communicating an inner side of the surrounding frame to an external space.

A power semiconductor device includes a frame, a semiconductor element, a substrate, and a sealing resin. The semiconductor element is disposed on the frame. The substrate is disposed on a side of the frame opposite to a side on which the semiconductor element is disposed. The sealing resin seals the semiconductor element and the substrate. The substrate includes a metal sheet, a first insulating sheet on one main surface side of the metal sheet, and a second insulating sheet on the other main surface side of the metal sheet. The metal sheet has flexibility at a normal temperature.

Packaged semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes a substrate and a plurality of integrated circuit dies coupled to the substrate. The device also includes a molding material disposed over the substrate between adjacent ones of the plurality of integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies, wherein the cap layer comprises an electrically conductive material that directly contacts the molding material and each of the plurality of integrated circuit dies.

A semiconductor package includes a substrate comprising a chip area and a peripheral area, at least one semiconductor chip mounted on the chip area, a plurality of stubs respectively on a plurality of pads arranged in the peripheral area, and a molding unit configured to cover at least a partial area of the at least one semiconductor chip and at least a partial area of the plurality of stubs on the substrate while exposing an upper surface of at least one of the plurality of stubs to outside of the molding unit, wherein at least a partial area of the upper surface of at least one of the plurality of stubs is substantially flat.

A semiconductor package includes a substrate comprising a chip area and a peripheral area, at least one semiconductor chip mounted on the chip area, a plurality of stubs respectively on a plurality of pads arranged in the peripheral area, and a molding unit configured to cover at least a partial area of the at least one semiconductor chip and at least a partial area of the plurality of stubs on the substrate while exposing an upper surface of at least one of the plurality of stubs to outside of the molding unit, wherein at least a partial area of the upper surface of at least one of the plurality of stubs is substantially flat.

A semiconductor package includes a first substrate, a first conductive layer, a first surface mount device (SMD) and a first bonding wire. The first substrate has a first top surface. The first conductive layer is formed on the first top surface and has a first conductive element and a second conductive element separated from each other. The first SMD is mounted on the first top surface, overlapping with but electrically isolated from the first conductive element. The first bonding wire electrically connects the first SMD with the first conductive layer.

The present application provides a method for preparing a semiconductor package The method includes bonding a bottom device die onto a package substrate; attaching a top device die onto the bottom device die; attaching an additional package substrate onto the top device die; establishing electrical connection between the additional package substrate and the top device die, between the additional package substrate and the package substrate, and between the top device die and the package substrate; and encapsulating the bottom device die, the top device die and the additional package substrate by an encapsulant.

A mounting jig for a semiconductor device includes an insulated circuit board positioning jig having a concave part in which an insulated circuit board is placed, a tubular contact element positioning jig disposed on an upper side of the insulated circuit board and having a plurality of positioning holes at predetermined positions to insert a plurality of tubular contact elements respectively, and a tubular contact element press-down jig having a flat plate and a plurality of projections extending from a lower surface of the flat plate. The plurality of projections includes a first length from the flat plate on a side closer to an outer circumference of the insulated circuit board, and a second length from the flat plate inside the outer circumference of the insulated circuit board. The first length is shorter than the second length.

Provided is a structure including a first member (2); a second member (3) disposed opposite to the first member (2); and a glass layer (4) disposed between the first member (2) and the second member (3) so as to bond the first member (2) and the second member (3). A glass transition point of the glass layer (4) is lower than a temperature of the glass layer (4) under operation. In the glass layer (4), at least either of ceramic and metallic particles 4b, 4c is dispersed. In a temperature region lower than the glass transition point of the glass layer (4), a thermal expansion coefficient thereof falls in between thermal expansion coefficients of the first member (2) and the second member (3). This allows thermal strain caused within the structure (1) to be reduced when the structure (1) is operated at a higher temperature than a room temperature.

Provided is a structure including a first member (2); a second member (3) disposed opposite to the first member (2); and a glass layer (4) disposed between the first member (2) and the second member (3) so as to bond the first member (2) and the second member (3). A glass transition point of the glass layer (4) is lower than a temperature of the glass layer (4) under operation. In the glass layer (4), at least either of ceramic and metallic particles 4b, 4c is dispersed. In a temperature region lower than the glass transition point of the glass layer (4), a thermal expansion coefficient thereof falls in between thermal expansion coefficients of the first member (2) and the second member (3). This allows thermal strain caused within the structure (1) to be reduced when the structure (1) is operated at a higher temperature than a room temperature.