A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.

One example of a pre-molded lead frame includes a mold body, a plurality of recesses, and a plurality of first leads. The mold body includes a first main surface and a second main surface opposite to the first main surface. Each recess of the plurality of recesses extends from the first main surface into the mold body. The plurality of first leads are coupled to the mold body and extend from a third surface of the mold body. The third surface extends between the first main surface and the second main surface.

A semiconductor package includes first semiconductor chips stacked on a package substrate, a lowermost first semiconductor chip of the first semiconductor chips including a recessed region, and a second semiconductor chip inserted in the recessed region, the second semiconductor chip being connected to the package substrate.

Wideband power combiners and splitters are provided herein. In certain embodiments, a power combiner/splitter is implemented with a first coil connecting a first port and a second port, and a second coil connecting a third port and a fourth port. The first coil and the second coil are inductively coupled to one another. For example, the first coil and the second coil can be formed using adjacent conductive layers of a semiconductor chip, an integrated passive device, or a laminate. The power combiner/splitter further includes a fifth port tapping a center of the first coil and a sixth port tapping a center of the second coil. The fifth port and the sixth port serve to connect capacitors and/or other impedance to the center of the coils to thereby provide wideband operation.

An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.

In a general aspect, an electronic device assembly can include a dielectric substrate having a first surface and a second surface opposite the first surface and a leadframe including a first leadframe portion including a first plurality of signal leads, and a second leadframe portion including a second plurality of signal leads. The substrate can be coupled with a subset of the first plurality of signal leads and a subset of the second plurality of signal leads. Signal leads of the first plurality, other than the subset of the first plurality of signal leads, can be spaced from the dielectric substrate. Signal leads of the second plurality, other than the subset of the second plurality of signal leads, can be spaced from the dielectric substrate. The assembly can further include one or more semiconductor die that are electrically coupled with the substrate and the leadframe portions.

A semiconductor device includes an insulating layer, a barrier electrode layer formed on the insulating layer, a Cu electrode layer that includes a metal composed mainly of copper and that is formed on a principal surface of the barrier electrode layer, and an outer-surface insulating film that includes copper oxide, that coats an outer surface of the Cu electrode layer, and that is in contact with the principal surface of the barrier electrode layer.

A lead-frame assembly is disclosed, for a semiconductor die and comprising a die attach pad and a plurality of elongate leads spaced apart therefrom; wherein each elongate lead has a first proximal end portion, a second distal end portion and a middle portion therebetween; wherein the die attach pad and each of the plurality of elongate leads each comprise a coating-free portion, and a coated portion having a coating material thereon; wherein a part of a perimeter of the die attach pad proximal each lead is comprised in the coating-free portion, and wherein the proximal end portion of each elongate lead is comprised in the coating-free portion. Associated package assemblies and methods are also disclosed.

A semiconductor package includes a semiconductor die including terminals, a plurality of leads, at least some of the leads being electrically coupled to the terminals within the semiconductor package, a sensor on a surface of the semiconductor die, laser shielding forming a perimeter around the sensor on the surface of the semiconductor die, and a mold compound surrounding the semiconductor die except for an area inside the perimeter on the surface of the semiconductor die such that the sensor is exposed to an external environment.