Patent classifications
H01L2224/80464
SEMICONDUCTOR MODULE, DISPLAY DEVICE, AND SEMICONDUCTOR MODULE MANUFACTURING METHOD
Resin covers a side surface and a back surface of a blue LED and holds the blue LED level. An electrode is disposed between a top surface of a wiring substrate and a back surface of the blue LED, extends through the resin, and electrically connects the wiring substrate and the blue LED to each other. A light-outgoing surface (top-surface) of the blue LED is exposed without being covered with the resin, and the light-outgoing surface (top-surface) is flush with a top surface of the resin.
SEMICONDUCTOR MODULE, DISPLAY DEVICE, AND SEMICONDUCTOR MODULE MANUFACTURING METHOD
Resin covers a side surface and a back surface of a blue LED and holds the blue LED level. An electrode is disposed between a top surface of a wiring substrate and a back surface of the blue LED, extends through the resin, and electrically connects the wiring substrate and the blue LED to each other. A light-outgoing surface (top-surface) of the blue LED is exposed without being covered with the resin, and the light-outgoing surface (top-surface) is flush with a top surface of the resin.
POWER MODULE AND FABRICATION METHOD OF THE POWER MODULE
A power module includes: a plate-shaped thick copper substrate, a conductive stress relaxation metal layer disposed on the thick copper substrate, a semiconductor device disposed on the stress relaxation metal layer, and a plated layer disposed on the stress relaxation metal layer, wherein the semiconductor device is bonded to the stress relaxation metal layer via the plated layer. The thick copper substrate includes a first thick copper layer and a second thick copper layer disposed on the first thick copper layer, and the stress relaxation metal layer is disposed on the second thick copper layer. A part of the semiconductor device is embedded to be fixed to the stress relaxation metal layer. A bonded surface between the semiconductor device and the stress relaxation metal layer are integrated to each other by means of diffusion bonding or solid phase diffusion bonding.
POWER MODULE AND FABRICATION METHOD OF THE POWER MODULE
A power module includes: a plate-shaped thick copper substrate, a conductive stress relaxation metal layer disposed on the thick copper substrate, a semiconductor device disposed on the stress relaxation metal layer, and a plated layer disposed on the stress relaxation metal layer, wherein the semiconductor device is bonded to the stress relaxation metal layer via the plated layer. The thick copper substrate includes a first thick copper layer and a second thick copper layer disposed on the first thick copper layer, and the stress relaxation metal layer is disposed on the second thick copper layer. A part of the semiconductor device is embedded to be fixed to the stress relaxation metal layer. A bonded surface between the semiconductor device and the stress relaxation metal layer are integrated to each other by means of diffusion bonding or solid phase diffusion bonding.
Wafer level package and manufacturing method thereof
A wafer level package includes a substrate including bonding pads and a first protection dam and having a plurality of circuit pattern units disposed on a side; a printed circuit board having a plurality of connection pads, a second protection dam and via holes disposed thereon; and a connection unit connected to some of the plurality of connection pads and the second protection dam disposed on the printed circuit board. Freedom of design can be improved through the wafer level package and the manufacturing method thereof, and reliability of the wafer level package can be improved. The manufacturing process can be simplified as the bridge process is omitted when wiring is designed, and the size of an element may be reduced.
Wafer level package and manufacturing method thereof
A wafer level package includes a substrate including bonding pads and a first protection dam and having a plurality of circuit pattern units disposed on a side; a printed circuit board having a plurality of connection pads, a second protection dam and via holes disposed thereon; and a connection unit connected to some of the plurality of connection pads and the second protection dam disposed on the printed circuit board. Freedom of design can be improved through the wafer level package and the manufacturing method thereof, and reliability of the wafer level package can be improved. The manufacturing process can be simplified as the bridge process is omitted when wiring is designed, and the size of an element may be reduced.
WAFER LEVEL PACKAGE AND MANUFACTURING METHOD THEREOF
A wafer level package includes a substrate including bonding pads and a first protection dam and having a plurality of circuit pattern units disposed on a side; a printed circuit board having a plurality of connection pads, a second protection dam and via holes disposed thereon; and a connection unit connected to some of the plurality of connection pads and the second protection dam disposed on the printed circuit board. Freedom of design can be improved through the wafer level package and the manufacturing method thereof, and reliability of the wafer level package can be improved. The manufacturing process can be simplified as the bridge process is omitted when wiring is designed, and the size of an element may be reduced.
WAFER LEVEL PACKAGE AND MANUFACTURING METHOD THEREOF
A wafer level package includes a substrate including bonding pads and a first protection dam and having a plurality of circuit pattern units disposed on a side; a printed circuit board having a plurality of connection pads, a second protection dam and via holes disposed thereon; and a connection unit connected to some of the plurality of connection pads and the second protection dam disposed on the printed circuit board. Freedom of design can be improved through the wafer level package and the manufacturing method thereof, and reliability of the wafer level package can be improved. The manufacturing process can be simplified as the bridge process is omitted when wiring is designed, and the size of an element may be reduced.
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a display device includes: immersing a mask including openings, in a solution; seating light-emitting diode chips respectively in the openings of the mask; arranging a first flexible substrate including first wirings thereon, below the mask, and aligning the first wirings to respectively correspond to the openings of the mask; removing from the solution, the first flexible substrate with the first wirings corresponding to the openings of the mask together with the mask with the light-emitting diode chips seated in the openings thereof; bonding the light-emitting diode chips and the first wirings to each other; providing a second flexible substrate including second wirings thereon, and aligning the second wirings to respectively correspond to the light-emitting diode chips; and bonding the light-emitting diode chips and the second wirings to each other, to form the display device.
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a display device includes: immersing a mask including openings, in a solution; seating light-emitting diode chips respectively in the openings of the mask; arranging a first flexible substrate including first wirings thereon, below the mask, and aligning the first wirings to respectively correspond to the openings of the mask; removing from the solution, the first flexible substrate with the first wirings corresponding to the openings of the mask together with the mask with the light-emitting diode chips seated in the openings thereof; bonding the light-emitting diode chips and the first wirings to each other; providing a second flexible substrate including second wirings thereon, and aligning the second wirings to respectively correspond to the light-emitting diode chips; and bonding the light-emitting diode chips and the second wirings to each other, to form the display device.