H01L2224/81411

Flexible circuit board and chip package including same

A flexible circuit board according to an embodiment of the present invention comprises: a substrate; a first wiring pattern layer disposed on a first surface of the substrate; a second wiring pattern layer disposed on a second surface opposite the first surface of the substrate; a first dummy pattern part disposed on the second surface of the substrate on which the second wiring pattern layer is not disposed; a first protection layer disposed on the first wiring pattern layer; and a second protection layer disposed on the second wiring pattern layer and the first dummy pattern part, wherein at least a part of the first dummy pattern part overlaps with the first wiring pattern layer in a vertical direction.

Wiring substrate, semiconductor package and method of manufacturing wiring substrate

A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.

Wiring substrate, semiconductor package and method of manufacturing wiring substrate

A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.

Method of repairing light emitting device and display panel having repaired light emitting device

A display panel including a circuit board having first pads, a plurality of light emitting devices disposed on the circuit board and having second pads, at least one of the light emitting devices including a repaired light emitting device, and a metal bonding layer bonding the first pads and the second pads, in which the metal bonding layer of the repaired light emitting device has at least one of a thickness and a composition different from that of the metal bonding layer of the remaining light emitting devices.

Method of repairing light emitting device and display panel having repaired light emitting device

A display panel including a circuit board having first pads, a plurality of light emitting devices disposed on the circuit board and having second pads, at least one of the light emitting devices including a repaired light emitting device, and a metal bonding layer bonding the first pads and the second pads, in which the metal bonding layer of the repaired light emitting device has at least one of a thickness and a composition different from that of the metal bonding layer of the remaining light emitting devices.

ELECTRICAL CONNECTION PAD WITH ENHANCED SOLDERABILITY AND CORRESPONDING METHOD FOR LASER TREATING AN ELECTRICAL CONNECTION PAD
20220369455 · 2022-11-17 ·

The invention concerns an electrical connection pad (10′) for providing an electrical connection between components of an electronic system, wherein the electrical connection pad comprises: a metallic layer (12); and a laser induced periodic surface structure (20), LIPSS, formed on an external surface (16) of the electrical connection pad (10) and exposing the metallic layer (12) and a method for correspondingly laser-treating an electrical connection pad (10).

ELECTRICAL CONNECTION PAD WITH ENHANCED SOLDERABILITY AND CORRESPONDING METHOD FOR LASER TREATING AN ELECTRICAL CONNECTION PAD
20220369455 · 2022-11-17 ·

The invention concerns an electrical connection pad (10′) for providing an electrical connection between components of an electronic system, wherein the electrical connection pad comprises: a metallic layer (12); and a laser induced periodic surface structure (20), LIPSS, formed on an external surface (16) of the electrical connection pad (10) and exposing the metallic layer (12) and a method for correspondingly laser-treating an electrical connection pad (10).

SEMICONDUCTOR PACKAGE
20220367327 · 2022-11-17 ·

A semiconductor package includes: a redistribution substrate including a lower insulating layer, a redistribution via penetrating through the lower insulating layer, a redistribution layer connected to the redistribution via on the lower insulating layer, and an upper insulating layer on the lower insulating layer and having a first surface and a second surface opposing the first surface; a pad structure including a pad portion, disposed on the first surface of the redistribution substrate, and a via portion penetrating through the upper insulating layer to connect the redistribution layer and the pad portion to each other; a semiconductor chip disposed on the first surface of the redistribution substrate and including a pad; and a connection member in contact with the pad portion and the pad of the semiconductor chip between the pad structure and the pad of the semiconductor chip. The pad portion of the pad structure has a hemispherical shape, and a side surface of the via portion of the pad structure is in contact with the upper insulating layer.

Semiconductor package and method

In an embodiment, a device includes: a back-side redistribution structure including: a metallization pattern on a first dielectric layer; and a second dielectric layer on the metallization pattern; a through via extending through the first dielectric layer to contact the metallization pattern; an integrated circuit die adjacent the through via on the first dielectric layer; a molding compound on the first dielectric layer, the molding compound encapsulating the through via and the integrated circuit die; a conductive connector extending through the second dielectric layer to contact the metallization pattern, the conductive connector being electrically connected to the through via; and an intermetallic compound at the interface of the conductive connector and the metallization pattern, the intermetallic compound extending only partially into the metallization pattern.

Semiconductor package and method

In an embodiment, a device includes: a back-side redistribution structure including: a metallization pattern on a first dielectric layer; and a second dielectric layer on the metallization pattern; a through via extending through the first dielectric layer to contact the metallization pattern; an integrated circuit die adjacent the through via on the first dielectric layer; a molding compound on the first dielectric layer, the molding compound encapsulating the through via and the integrated circuit die; a conductive connector extending through the second dielectric layer to contact the metallization pattern, the conductive connector being electrically connected to the through via; and an intermetallic compound at the interface of the conductive connector and the metallization pattern, the intermetallic compound extending only partially into the metallization pattern.