H01L2224/8146

Semiconductor package and method of manufacturing the same

A semiconductor package includes a substrate, a plurality of semiconductor devices stacked on the substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the substrate and the plurality of semiconductor devices, and molding resin surrounding the plurality of semiconductor devices. At least one of the underfill fillets is exposed from side surfaces of the molding resin.

Method for manufacturing semiconductor package having redistribution layer

A method of manufacturing a semiconductor package includes forming a plurality of trenches at a first surface of a silicon substrate, forming a conductive pad inside each of the plurality of trenches, forming a redistribution layer on the first surface of the silicon substrate, forming an external connection terminal on a first surface of the redistribution layer, removing the silicon substrate to expose each conductive pad, mounting a semiconductor chip to be connected to the conductive pads, and forming an encapsulant to cover at least one surface of the semiconductor chip.

Method for manufacturing semiconductor package having redistribution layer

A method of manufacturing a semiconductor package includes forming a plurality of trenches at a first surface of a silicon substrate, forming a conductive pad inside each of the plurality of trenches, forming a redistribution layer on the first surface of the silicon substrate, forming an external connection terminal on a first surface of the redistribution layer, removing the silicon substrate to expose each conductive pad, mounting a semiconductor chip to be connected to the conductive pads, and forming an encapsulant to cover at least one surface of the semiconductor chip.

Lead structure of circuit with increased gaps between adjacent leads

The present invention discloses a lead structure of the circuit, which comprises a first lead and a second lead. The first lead includes a first bump connecting part and a first lead segment. The first lead segment is connected to the first bump connecting part. The width of the first lead segment is smaller than the width of the first bump connecting part. The second lead is adjacent to the first lead and there is a lead gap therebetween. The second lead also includes a second bump connecting part and a first lead segment. The first lead segment of the second lead is connected to the second bump connecting part. The second bump connecting part and the first bump connecting part are arranged staggeredly. The second bump connecting part is adjacent to the first lead segment of the first lead.

Solder-pinning metal pads for electronic components

Solder-pinning metal pads for electronic components and techniques for use thereof to mitigate de-wetting are provided. In one aspect, a structure includes: a substrate; and a solder pad on the substrate, wherein the solder pad has sidewalls extending up from a surface thereof. For instance, the sidewalls can be present at edges of the solder pad, or inset from the edges of the solder pad. The sidewalls can be vertical or extend up from the solder pad at an angle. The sidewalls can be formed from the same material or a different material as the solder pad. A method is also provided that includes forming a solder pad on a substrate, the solder pad comprising sidewalls extending up from a surface thereof.

Solder-pinning metal pads for electronic components

Solder-pinning metal pads for electronic components and techniques for use thereof to mitigate de-wetting are provided. In one aspect, a structure includes: a substrate; and a solder pad on the substrate, wherein the solder pad has sidewalls extending up from a surface thereof. For instance, the sidewalls can be present at edges of the solder pad, or inset from the edges of the solder pad. The sidewalls can be vertical or extend up from the solder pad at an angle. The sidewalls can be formed from the same material or a different material as the solder pad. A method is also provided that includes forming a solder pad on a substrate, the solder pad comprising sidewalls extending up from a surface thereof.

FINGERPRINT SENSOR AND MANUFACTURING METHOD THEREOF
20230009679 · 2023-01-12 ·

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

FINGERPRINT SENSOR AND MANUFACTURING METHOD THEREOF
20230009679 · 2023-01-12 ·

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

Electrionic devices with interposer and redistribution layer

In one example, an electronic device comprises a base substrate comprising a base substrate conductive structure, a first electronic component over a first side of the base substrate, an encapsulant over the first side of the base substrate, wherein the encapsulant contacts a lateral side of the electronic component, an interposer substrate over a first side of the encapsulant and comprising an interposer substrate conductive structure, and a vertical interconnect in the encapsulant and coupled with the base substrate conductive structure and the interposer substrate conductive structure. A first one of the base substrate or the interposer substrate comprises a redistribution layer (RDL) substrate, and a second one of the base substrate or the interposer substrate comprises a laminate substrate. Other examples and related methods are also disclosed herein.

Electrionic devices with interposer and redistribution layer

In one example, an electronic device comprises a base substrate comprising a base substrate conductive structure, a first electronic component over a first side of the base substrate, an encapsulant over the first side of the base substrate, wherein the encapsulant contacts a lateral side of the electronic component, an interposer substrate over a first side of the encapsulant and comprising an interposer substrate conductive structure, and a vertical interconnect in the encapsulant and coupled with the base substrate conductive structure and the interposer substrate conductive structure. A first one of the base substrate or the interposer substrate comprises a redistribution layer (RDL) substrate, and a second one of the base substrate or the interposer substrate comprises a laminate substrate. Other examples and related methods are also disclosed herein.