A self-densifying interconnection is formed between a high-temperature semiconductor device selected from a GaN or SiC-based device and a substrate. The interconnection includes a matrix of micron-sized silver particles in an amount from approximately 10 to 60 weight percent; the micron-sized silver particles having a particle size ranging from approximately 0.1 microns to 15 microns. Bonding particles are used to chemically bind the matrix of micron-sized silver particles. The bonding particles are core silver nanoparticles with in-situ formed surface silver nanoparticles chemically bound to the surface of the core silver nanoparticles and, at the same time, chemically bound to the matrix of micron-sized silver particles. The bonding particles have a core particle size ranging from approximately 10 to approximately 100 nanometers while the in-situ formed surface silver nanoparticles have a particle size of approximately 3-9 nanometers.

Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.

Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.

A light emitting diode module includes a first conductive device, a second conductive device, an insulating structure and a plating layer. The first conductive device includes a first metal layer and a first protecting layer covering the first metal layer. The second conductive device includes a second metal layer and a second protecting layer covering the second metal layer. The insulating structure covers around the first and the second conductive devices. The plating layer is disposed on the first and the second protecting layers in a first and a second openings of the insulating structure. The insulating structure covers portions of upper surfaces of the first and the second conductive devices. The plating layer covers remaining portions of the upper surfaces of the first and the second conductive devices. Lower surfaces of the first and the second conductive devices are located in the second opening.

A light emitting diode module includes a first conductive device, a second conductive device, an insulating structure and a plating layer. The first conductive device includes a first metal layer and a first protecting layer covering the first metal layer. The second conductive device includes a second metal layer and a second protecting layer covering the second metal layer. The insulating structure covers around the first and the second conductive devices. The plating layer is disposed on the first and the second protecting layers in a first and a second openings of the insulating structure. The insulating structure covers portions of upper surfaces of the first and the second conductive devices. The plating layer covers remaining portions of the upper surfaces of the first and the second conductive devices. Lower surfaces of the first and the second conductive devices are located in the second opening.

A semiconductor package assembly includes a carrier with a die attach surface and a contact pad separated from the die attach surface, a semiconductor die mounted on the die attach surface, the semiconductor die having a front side metallization that faces away from the die attach surface, an interconnect ribbon attached to the semiconductor die and the contact pad such that the interconnect ribbon electrically connects the front side metallization to the contact pad, and an electrically insulating encapsulant body that encapsulates the semiconductor die and at least part of the interconnect ribbon. The interconnect ribbon includes a layer stack of a first metal layer and a second layer formed on top of the first metal layer. The first metal layer includes a different metal as the second metal layer. The first metal layer faces the front side metallization.

A semiconductor package assembly includes a carrier with a die attach surface and a contact pad separated from the die attach surface, a semiconductor die mounted on the die attach surface, the semiconductor die having a front side metallization that faces away from the die attach surface, an interconnect ribbon attached to the semiconductor die and the contact pad such that the interconnect ribbon electrically connects the front side metallization to the contact pad, and an electrically insulating encapsulant body that encapsulates the semiconductor die and at least part of the interconnect ribbon. The interconnect ribbon includes a layer stack of a first metal layer and a second layer formed on top of the first metal layer. The first metal layer includes a different metal as the second metal layer. The first metal layer faces the front side metallization.

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

A semiconductor device includes: a substrate; a semiconductor element arranged on the substrate; a plate-like member electrically connected to the semiconductor element; a first electrode formed on the semiconductor element and joined to the plate-like member with solder; a second electrode formed on the semiconductor element and spaced from the first electrode, and including a metal capable of forming an alloy with the solder; and a metal film formed on the semiconductor element and spaced from the second electrode in a region on the first electrode side as seen from the second electrode, in a two-dimensional view of the semiconductor element as seen from the plate-like member, and including a metal capable of forming an alloy with the solder.