Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.

A case includes a terminal disposition portion which includes a disposition surface projecting from an inner wall surface toward an open area, exposes an exposure region on a front surface of an external connecting terminal, and embeds therein a rear surface of the external connecting terminal. In the case, at at least part of both sides along a pair of opposite sides of the exposure region, the disposition surface is located between the front surface and the rear surface to have a level difference to the front surface. In a semiconductor device with the above-described configuration, the case does not extend to the exposure region on the front surface of the external connecting terminal. Therefore, no encapsulation resin flows into an interfacial debonding gap between the external connecting terminal and the case, thus curbing further advance of the interfacial debonding.

In a semiconductor device, a first outer edge of a conductive pattern is located between the outermost edge of a first dimple and the innermost edge of a second dimple in a cross-sectional view of the device. When thermal stress due to temperature changes in the semiconductor device is applied to the ceramic circuit board, the first and second dimples suppress deformation of the ceramic circuit board that is caused due to the temperature changes. As a result, cracks in the ceramic circuit board and separation of the metal plate and the conductive pattern are prevented.

In a semiconductor device, a first outer edge of a conductive pattern is located between the outermost edge of a first dimple and the innermost edge of a second dimple in a cross-sectional view of the device. When thermal stress due to temperature changes in the semiconductor device is applied to the ceramic circuit board, the first and second dimples suppress deformation of the ceramic circuit board that is caused due to the temperature changes. As a result, cracks in the ceramic circuit board and separation of the metal plate and the conductive pattern are prevented.

A semiconductor includes a semiconductor element, a connecting terminal electrically connected to the semiconductor element, and a case including an opening space for housing the semiconductor element, a frame which surrounds the opening space and in which the connecting terminal is partially embedded, and a terminal arrangement portion protruding from the frame towards the opening space. The connecting terminal includes an internal terminal portion that extends towards the opening space with respect to the frame, the internal terminal portion having a front surface that is electrically connected to the semiconductor element and exposed to the opening space, and a rear surface that is fixed to the terminal arrangement portion.

A semiconductor includes a semiconductor element, a connecting terminal electrically connected to the semiconductor element, and a case including an opening space for housing the semiconductor element, a frame which surrounds the opening space and in which the connecting terminal is partially embedded, and a terminal arrangement portion protruding from the frame towards the opening space. The connecting terminal includes an internal terminal portion that extends towards the opening space with respect to the frame, the internal terminal portion having a front surface that is electrically connected to the semiconductor element and exposed to the opening space, and a rear surface that is fixed to the terminal arrangement portion.

A light emitting device disclosed in an embodiment includes: a light emitting chip including a plurality of semiconductor layers and first and second electrodes under the plurality of semiconductor layers; a first lead frame disposed under a first electrode of the light emitting chip; a second lead frame disposed under a second electrode of the light emitting chip; a protective chip disposed between the first and second lead frames and electrically connected to the first and second electrodes; and a reflective member disposed on a periphery of the light emitting chip and the first and second lead frames.

A light emitting device disclosed in an embodiment includes: a light emitting chip including a plurality of semiconductor layers and first and second electrodes under the plurality of semiconductor layers; a first lead frame disposed under a first electrode of the light emitting chip; a second lead frame disposed under a second electrode of the light emitting chip; a protective chip disposed between the first and second lead frames and electrically connected to the first and second electrodes; and a reflective member disposed on a periphery of the light emitting chip and the first and second lead frames.

A light emitting device disclosed in an embodiment includes: a light emitting chip including a plurality of semiconductor layers and first and second electrodes under the plurality of semiconductor layers; a first lead frame disposed under a first electrode of the light emitting chip; a second lead frame disposed under a second electrode of the light emitting chip; a protective chip disposed between the first and second lead frames and electrically connected to the first and second electrodes; and a reflective member disposed on a periphery of the light emitting chip and the first and second lead frames.

A light emitting device disclosed in an embodiment includes: a light emitting chip including a plurality of semiconductor layers and first and second electrodes under the plurality of semiconductor layers; a first lead frame disposed under a first electrode of the light emitting chip; a second lead frame disposed under a second electrode of the light emitting chip; a protective chip disposed between the first and second lead frames and electrically connected to the first and second electrodes; and a reflective member disposed on a periphery of the light emitting chip and the first and second lead frames.