Patent classifications
H01L2224/85464
PACKAGE STRUCTURE
A package structure is provided. The package structure includes a die, a lead frame, and a conductive glue. The lead frame includes a die pad and a retaining wall structure. The die pad is configured to support the die, and the retaining wall structure surrounds the die. The conductive glue is disposed between the die and the lead frame.
PACKAGE STRUCTURE
A package structure is provided. The package structure includes a die, a lead frame, and a conductive glue. The lead frame includes a die pad and a retaining wall structure. The die pad is configured to support the die, and the retaining wall structure surrounds the die. The conductive glue is disposed between the die and the lead frame.
Temporary protective film for semiconductor sealing molding
Disclosed is a temporary protective film for semiconductor sealing molding 10 including a support film 1; and an adhesive layer 2 provided on the support film 1 and containing an acrylic rubber. A solid shear modulus at 200° C. of the temporary protective film for semiconductor sealing molding 10 may be 5.0 MPa or higher.
Temporary protective film for semiconductor sealing molding
Disclosed is a temporary protective film for semiconductor sealing molding 10 including a support film 1; and an adhesive layer 2 provided on the support film 1 and containing an acrylic rubber. A solid shear modulus at 200° C. of the temporary protective film for semiconductor sealing molding 10 may be 5.0 MPa or higher.
Power module substrate and power module
A power module substrate includes an insulating substrate and a metal plate. The metal plate is joined to the insulating substrate with a brazing material in between. As to surface roughness of a lateral surface of the metal plate in a thickness direction, the surface roughness of at least a corner part farthest from a center of the metal plate in plan view is larger than the surface roughness of plane parts sandwiching the corner part.
APPARATUS AND METHODS FOR TOOL MARK FREE STITCH BONDING
Apparatus and method for tool mark free stich bonding. In some embodiments, a method for wire bonding can include feeding a wire through a capillary tip and attaching a first end of the wire to a first location, thereby forming a ball bond. The method can further include moving the capillary tip towards a second location while the wire feeds out of the capillary tip. The method can further include attaching a second end of the wire to the second location while preventing contact between the capillary tip and the second location, thereby forming a stitch bond without a tool mark at the second location.
APPARATUS AND METHODS FOR TOOL MARK FREE STITCH BONDING
Apparatus and method for tool mark free stich bonding. In some embodiments, a method for wire bonding can include feeding a wire through a capillary tip and attaching a first end of the wire to a first location, thereby forming a ball bond. The method can further include moving the capillary tip towards a second location while the wire feeds out of the capillary tip. The method can further include attaching a second end of the wire to the second location while preventing contact between the capillary tip and the second location, thereby forming a stitch bond without a tool mark at the second location.
Capacitor-wirebond pad structures for integrated circuit packages
Disclosed herein are capacitor-wirebond pad structures for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a die and an IC package support. The IC package support may include a capacitor, and the capacitor may include a first capacitor plate, a second capacitor plate, and a capacitor dielectric between the first capacitor plate and the second capacitor plate. The die may be wirebonded to the first capacitor plate.
Capacitor-wirebond pad structures for integrated circuit packages
Disclosed herein are capacitor-wirebond pad structures for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a die and an IC package support. The IC package support may include a capacitor, and the capacitor may include a first capacitor plate, a second capacitor plate, and a capacitor dielectric between the first capacitor plate and the second capacitor plate. The die may be wirebonded to the first capacitor plate.
Semiconductor package with connection lug
A semiconductor package includes a first die pad, a first semiconductor die mounted on the first die pad, an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die, a plurality of package leads that each protrude out of a first outer face of the encapsulant body, a connection lug that protrudes out of a second outer face of the encapsulant body, the second outer face being opposite from the first outer face. The first semiconductor die includes first and second voltage blocking terminals. The connection lug is electrically connected to one of the first and second voltage blocking terminals of the first semiconductor die. A first one of the package leads is electrically connected to an opposite one of the first and second voltage blocking terminals of the first semiconductor die that the first connection lug is electrically connected to.