A method for forming a semiconductor structure includes forming a pattern having first and second line features extending in a first direction on a substrate. After depositing a photoresist layer on the substrate to cover the pattern, the photoresist layer is patterned to form a cut pattern including first and second cut features exposing portions of the respective first and second line features. In a top view, at least one of the first and second cut features is asymmetrically arranged with respect to a central axis of a corresponding first or second line feature. At least one angled ion implantation is performed to enlarge the first and second cut features in at least one direction perpendicular to the first direction. The portions of the first and second line features exposed by the respective first and second cut features are then removed.

A method includes performing a first substrate treatment on a substrate using a first dry process in a first substrate processing tool operating at vacuum; after the first substrate treatment, depositing a polymer film on an exposed surface of the substrate using a chemical vapor deposition (CVD) process in the first substrate processing tool; removing the substrate from the first substrate processing tool for a queue period; after the queue period, removing the polymer film from the substrate; and performing a second substrate treatment on the substrate using a second dry process in a second substrate processing tool.

A semiconductor device that is a chip-size-package-type semiconductor device that is facedown mountable includes: a semiconductor layer including a semiconductor substrate and a low-concentration impurity layer in contact with an upper surface of the semiconductor substrate; a metal layer having a thickness of at least 10 μm; a first vertical MOS transistor in the semiconductor layer; and a second vertical MOS transistor in the semiconductor layer. A side surface of the metal layer includes roughness forming vertical stripes in a direction perpendicular to the metal layer, and has a maximum height of profile greater than 1.0 μm. In a plan view of the semiconductor device, an area occupancy of a formation containing metal in the metal layer is at most 5% in a 10-μm square region located at least 13 μm inward from an outer edge of the semiconductor device, within an upper surface of the semiconductor device.

Alignment marks on a semiconductor device surface are exposed and exposed surfaces cleaned after an obscuring coating is applied over the surface and marks. The surface can be an attachment surface of the device and can include C4 solder bumps of a flip-chip type device and the coating can include a wafer level underfill coating that is substantially optically opaque. Laser ablation, such as with a UV laser, can remove the coating while minimizing heat transfer to the device.

An etching method includes: providing a substrate having a film and a patterned mask on the film; forming a silicon-containing layer including silicon, carbon, and nitrogen on the substrate using a precursor gas containing silicon; and performing a plasma etching on the film. The substrate is placed under a depressurized environment for a time period from a start time point of the step of forming the silicon-containing layer on the substrate to an end time point of the step of performing the plasma etching on the film.

A plasma processing method includes a substrate processing step of performing predetermined processing on a target substrate loaded into a chamber by using plasma of a hydrogen-containing gas and unloading the processed substrate from the chamber; and an in-chamber processing step of processing surfaces of components in the chamber by plasma of an oxygen-containing gas after the substrate processing step is performed at least once. The substrate processing step is performed again at least once after the in-chamber processing step.

Aspects of this disclosure relate to selective removal of material of a layer, such as a carbon-containing layer. The layer can be over a patterned structure of two different materials. Treating the layer to cause the removal agent to be catalytically activated by a first area of the patterned structure to remove material of the organic material over the first area at a greater rate than over a second area of the patterned structure having a different composition from the first area.

Structures and formation methods of a semiconductor device structure are provided. The method includes forming a dummy gate stack over a semiconductor substrate and forming a spacer element over a sidewall of the dummy gate stack. The method also includes removing the dummy gate stack to form a recess exposing a semiconductor strip and forming an inhibition layer over an interior surface of the spacer element. The method further includes forming a gate dielectric layer in the recess to selectively cover the semiconductor strip. The inhibition layer substantially prevents the gate dielectric layer from being formed on the inhibition layer. In addition, the method includes forming a metal gate electrode over the gate dielectric layer.

Methods and apparatus for far edge trimming are provided herein. For example, an apparatus includes an integrated tool for processing a silicon substrate, comprising a vacuum substrate transfer chamber, an edge trimming apparatus coupled to the vacuum substrate transfer chamber and comprising a high pulse frequency laser and substrate support, wherein at least one of the high pulse frequency laser or the substrate support are movable with respect to each other and configured to trim about 2 mm to about 5 mm from a peripheral edge of a substrate when disposed on the substrate support, and a plasma etching apparatus coupled to the vacuum substrate transfer chamber and configured to etch silicon.

A method for selectively etching at least one feature in a first region with respect to a second region of a stack is provided. The first region is selectively etched with respect to the second region to form at least one partial feature in the first region, the at least one partial feature having a depth with respect to a surface of the second region. An in-situ a fluorine-free, non-conformal, carbon-containing mask is deposited over the first region and the second region, wherein the carbon-containing mask is selectively deposited on the second region at a second thickness with respect to the first region at a first thickness, the second thickness being greater than the first thickness. The first region is further etched in-situ to etch the at least one partial feature and wherein the carbon-containing mask acts as an etch mask for the second region.