Embodiments described herein generally relate to a sequential hydrogenation and nitridization process for reducing interfacial and bulk O atoms in a conductive structure in a semiconductor device. A hydrogenation and plasma nitridization process is performed on a metal nitride layer in a conductive structure prior to deposition of a second metal layer, thereby reducing interfacial oxygen atoms formed on a surface of the metal nitride and oxygen atoms present in the bulk metal layers of the conductive structure. As a result, adhesion of the second metal layer to the metal nitride layer is improved and the electrical resistance of the contact structure is reduced.

Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar structure formed via conventional methods. A plasma hydrogenation process followed by a plasma nitridization process is performed on a metal nitride layer in a film stack, thereby removing oxygen atoms disposed within layers of the film stack and, in some embodiments eliminating an oxygen-containing interfacial layer disposed within the film stack. As a result, an effective oxide thickness of the metal gate structure is reduced with little or no accompanying flatband voltage shift. Further, the metal gate structure operates with an increased leakage current that is as little as one quarter the increase in leakage current associated with a similar metal gate structure formed via conventional techniques.

A method for forming a multilayer barrier comprises forming a conductive line over a substrate, depositing a dielectric layer over the conductive line, forming a plug opening in the dielectric layer, forming a multilayer barrier through a plurality of deposition processes and corresponding plasma treatment processes.

A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.

An additive-containing aluminium nitride film containing an additive element selected from Sc, Y or Er is plasma etched through a mask for a period of time, t, with a plasma formed in a gaseous atmosphere having an associated gas pressure while an RF bias power is applied to the additive-containing aluminium nitride film. The gas pressure is reduced and/or the RF bias power is increased for a majority of the period of time t, so that the plasma etching becomes less chemical and more physical over a majority of the period of time, t.

An expansion sheet is adapted to be held and expanded by an expanding apparatus when a platelike workpiece is attached to the expansion sheet. The expansion sheet has a peripheral area around the workpiece where the expansion sheet is adapted to be held by first, second, third, and fourth holding units that are moveable away from each other. The expansion sheet includes a base sheet and an adhesive layer formed on the base sheet, the adhesive layer having adhesion adapted to be reduced by applying ultraviolet light. The adhesion of the adhesive layer in the peripheral area of the expansion sheet is lower than that in the other area of the expansion sheet.

A method of manufacturing a semiconductor device may include: forming an opening in a dielectric layer, the opening exposing a non-conductive layer disposed over a semiconductor substrate; forming a self-assembled monolayer (SAM) within the opening and over the non-conductive layer; forming a catalytic layer within the opening and over the SAM; filling the opening having the SAM and the catalytic layer with a conductive material to form a plug; and forming a barrier layer on sidewalls of the plug.

A method includes forming an insulating layer over a conductive feature; etching the insulating layer to expose a first surface of the conductive feature; covering the first surface of the conductive feature with a sacrificial material, wherein the sidewalls of the insulating layer are free of the sacrificial material; covering the sidewalls of the insulating layer with a barrier material, wherein the first surface of the conductive feature is free of the barrier material, wherein the barrier material includes tantalum nitride (TaN) doped with a transition metal; removing the sacrificial material; and covering the barrier material and the first surface of the conductive feature with a conductive material.

Disclosed are apparatus, systems, and methods for electroplating cobalt, nickel, and alloys thereof in interconnect features of partially or fully fabricated electronic devices. During electroplating, cobalt, nickel, or alloys thereof fill features by a bottom up electrofill mechanism. Examples of features that may be electrofilled with cobalt, nickel, or alloys thereof include micro TSVs, contacts for devices, and certain gates for transistors. Electroplating apparatus may include electroplating cells along with one or more instances of each of a post-electrofill module, an anneal chamber, a plasma pretreatment module, and a substrate pre-wetting module.

Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.