In an embodiment, a method includes forming an intentionally doped superlattice laminate on a support substrate, forming a Group III nitride-based device having a heterojunction on the superlattice laminate layer, and forming a charge blocking layer between the heterojunction and the superlattice laminate.

A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.

A semiconductor device includes a substrate, a channel layer, an active layer, and a gate electrode. The channel layer has a fin portion over the substrate. The active layer is over at least the fin portion of the channel layer. The active layer is configured to cause a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The gate electrode is in contact with a sidewall of the fin portion of the channel layer.

Provided is a semiconductor structure including a substrate, a first semiconductor layer, a second semiconductor layer, a gate electrode, a source electrode and a drain electrode. The first semiconductor layer contains a group III-V-VI semiconductor compound layer and is disposed on the substrate. The second semiconductor layer includes a group III-V semiconductor compound and is disposed on the first semiconductor layer. The gate electrode is disposed on the second semiconductor layer. The source electrode and the drain electrode are disposed on the second semiconductor layer beside the gate electrode.

A semiconductor structure includes a semiconductive substrate having a top surface, a III-V compound layer covering the top surface, and a passivation layer having a lower portion and an upper portion, both comprising at least one of oxide and nitride over the III-V compound layer. The semiconductor structure also includes an etch stop layer between the lower portion and the upper portion of the passivation layer, and a gate stack penetrating through the etch stop layer and landing on the lower portion of the passivation layer. The gate stack is surrounded by the etch stop layer.

A semiconductor device includes a buffer layer, a channel layer, and a carrier supply layer; first and second recesses formed in the channel layer and the carrier supply layer, to reach the buffer layer; first and second nitride semiconductor layers in the first and second recess, respectively; a source electrode over the first nitride semiconductor layer; a drain electrode over the second nitride semiconductor layer; and a gate electrode over the carrier supply layer between the first and second recesses. Each of the first and second nitride semiconductor layers includes first and second regions containing donors. An interface between the first and second regions is positioned deeper than two-dimensional electron gas on a surface side of the channel layer, and energy at a bottom of a conduction band of the second region is higher than energy at a bottom of a conduction band of the first region.

According to one embodiment, a semiconductor device includes a first semiconductor layer including a nitride semiconductor, a first electrode separated from the first semiconductor layer in a first direction, and a first insulating film including silicon and oxygen and being provided between the first semiconductor layer and the first electrode. The first insulating film has a first thickness in the first direction. The first insulating film includes a first position, and a distance between the first position and the first semiconductor layer is of the first thickness. A first hydrogen concentration of hydrogen at the first position is 2.510.sup.19 atoms/cm.sup.3 or less.

A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.

A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.

A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.