A semiconductor device includes a semiconductor body, at least one wiring layer disposed on the semiconductor body and a field effect transistor integrated in the semiconductor body. The field effect transistor has a plurality of gate electrodes residing in corresponding gate trenches formed in the semiconductor body. A first circuit is integrated in the semiconductor body adjacent to the field effect transistor, and a second circuit is integrated in the semiconductor body remote from the first circuit. A first additional trench is formed in the semiconductor body and includes at least one connecting line which electrically connects the first circuit and the second circuit. The semiconductor device also includes at least one conductive pad formed in the at least one wiring layer. The at least one conductive pad is arranged to at least partially cover the first additional trench to form a shielding of the at least one connecting line.

A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source and body regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source and body regions of the current sense transistor. The doped resistor region has a same conductivity type as the body regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.

In a conventional semiconductor chip, the source electrode and the sense pad electrode for current detection are provided separately and distanced from each other on the front surface of the semiconductor chip. The area occupied by the sense pad electrode must be several times the area of a MOSFET cell unit. Therefore, there is a problem that the area of the sense pad electrode is enlarged relative to the source electrode. Provided is a semiconductor device including a semiconductor substrate; a front surface electrode provided above the semiconductor substrate; a first wire for a first terminal connected to the front surface electrode; and a second wire for current sensing connected to the front surface electrode. A resistance of a path through which current flows through the second wire is higher than a resistance of a path through which the current flows through the first wire.

A main semiconductor device element has first and second p.sup.+-type high-concentration regions that mitigate electric field applied to bottoms of trenches. The first p.sup.+-type high-concentration regions are provided separate from p-type base regions, face the bottoms of the trenches in a depth direction, and extend in a linear shape in a first direction that is a same direction in which the trenches extend. Between adjacent trenches of the trenches, the second p.sup.+-type high-concentration regions are provided scattered in the first direction, separate from the first p.sup.+-type high-concentration regions and the trenches and in contact with the p-type base regions. Between the second p.sup.+-type high-concentration regions adjacent to one another in the first direction, n-type current spreading regions or n.sup.+-type high-concentration regions having an impurity concentration higher than that of the n-type current spreading regions are provided in contact with the second p.sup.+-type high-concentration regions.

A semiconductor device includes a semiconductor substrate having an active region in which a main switching element structure is formed, a current sense region in which a sense switching element structure is formed, and a peripheral region located around the active region and the current sense region. The semiconductor substrate is a 4H-SiC substrate having an off angle in a <11-20>direction. The current sense region is disposed in a range where the active region is not present when viewed along the <1-100>direction.

Semiconductor devices, and in particular semiconductor devices for improved resistance measurements and related methods are disclosed. Contact structures for semiconductor devices are disclosed that provide access to resistance measurements with reduced influence of testing-related resistances, thereby improving testing accuracy, particularly for semiconductor devices with low on-resistance ratings. A semiconductor device may include an active region and an inactive region that is arranged along a perimeter of the active region. The semiconductor device may be arranged with a topside contact to provide access for resistance measurements, for example Kelvin-sensing resistance measurements. Related methods include performing resistance measurements from a topside of the semiconductor device, even when the active region of the semiconductor device forms a vertical contact structure.

A SiC semiconductor device is provided that is capable of improving the detection accuracy of the current value of a principal current detected by a current sensing portion by restraining heat from escaping from the current sensing portion to a wiring member joined to a sensing-side surface electrode. The semiconductor device 1 includes a SiC semiconductor substrate, a source portion 27 including a principal-current-side unit cell 34, a current sensing portion 26 including a sensing-side unit cell 40, a source-side surface electrode 5 disposed above the source portion 27, and a sensing-side surface electrode 6 that is disposed above the current sensing portion 26 and that has a sensing-side pad 15 to which a sensing-side wire is joined, and, in the semiconductor device 1, the sensing-side unit cell 40 is disposed so as to avoid being positioned directly under the sensing-side pad 15.

Described herein is a power semiconductor device and corresponding method of production. The semiconductor device includes: a power device region formed in a semiconductor substrate and including first trenches and second trenches extending lengthwise in parallel with one another with semiconductor mesas between adjacent ones of the trenches, each first trench including a gate electrode at a first potential and each second trench including a field plate at a second potential; and a current sense region formed in the semiconductor substrate. A subset of the first trenches, a subset of the second trenches and a subset of the semiconductor mesas are common to both the current sense region and the power device region. The second trenches are interrupted along opposite first and second sides of the current sense region such that the field plates are interrupted between the power device region and the current sense region.

A layout of electrode pads on a front surface of a first semiconductor chip is different from a layout of them on a second semiconductor chip. An overall layout of the semiconductor chips mounted on the insulated substrate and the layouts of the electrode pads on the front surfaces of the semiconductor chips including the first and second semiconductor chips are determined so that a value of a resistance component and/or a value of a reactance component between each two electrode pads that are the same type respectively on different semiconductor chips and are connected in parallel become the same. As a result, current waveform oscillation between semiconductor devices fabricated on the semiconductor chips, respectively, may be suppressed.

The object of a silicon carbide semiconductor device according to the present disclosure is to prevent fluctuations in threshold voltage and prevent cracks in a barrier metal. A silicon carbide semiconductor device includes: a silicon carbide substrate; a semiconductor layer formed on the silicon carbide substrate; a gate electrode facing the semiconductor layer through a gate insulating film; an interlayer insulating film covering the gate electrode; a barrier metal formed on the interlayer insulating film; and a top electrode covering the barrier metal, wherein the barrier metal has a two-layer structure of a barrier metal and a barrier metal, and the barrier metal closer to the interlayer insulating film is made of a same metallic material as the barrier metal, the barrier metal being thinner than the barrier metal.