In an MEMS device, in a Z direction that is a direction in which a first core portion, a plurality of first bump wiring, and a plurality of first individual wiring are laminated, a width between the first core portion and a wiring substrate is wider than a maximum particle diameter of solid particles contained in an adhesive, and a width between a first wiring and a second wiring and a width between a third wiring and a fourth wiring are wider than the maximum particle diameter of the solid particles.

In an MEMS device, in a Z direction that is a direction in which a first core portion, a plurality of first bump wiring, and a plurality of first individual wiring are laminated, a width between the first core portion and a wiring substrate is wider than a maximum particle diameter of solid particles contained in an adhesive, and a width between a first wiring and a second wiring and a width between a third wiring and a fourth wiring are wider than the maximum particle diameter of the solid particles.

A package structure includes an interconnection layer; a passivation layer disposed on the interconnection layer, in which the interconnection layer and the passivation layer defined at least one opening; at least one elastic bump disposed on the interconnection layer, in which a portion of the elastic bump is embedded in the opening; and a conductive layer disposed on the elastic bump.

In an MEMS device, in a Z direction that is a direction in which a first core portion, a plurality of first bump wiring, and a plurality of first individual wiring are laminated, a width between the first core portion and a wiring substrate is wider than a maximum particle diameter of solid particles contained in an adhesive, and a width between a first wiring and a second wiring and a width between a third wiring and a fourth wiring are wider than the maximum particle diameter of the solid particles.

In an MEMS device, in a Z direction that is a direction in which a first core portion, a plurality of first bump wiring, and a plurality of first individual wiring are laminated, a width between the first core portion and a wiring substrate is wider than a maximum particle diameter of solid particles contained in an adhesive, and a width between a first wiring and a second wiring and a width between a third wiring and a fourth wiring are wider than the maximum particle diameter of the solid particles.

A package structure includes an interconnection layer; a passivation layer disposed on the interconnection layer, in which the interconnection layer and the passivation layer defined at least one opening; at least one elastic bump disposed on the interconnection layer, in which a portion of the elastic bump is embedded in the opening; and a conductive layer disposed on the elastic bump.

A package structure includes an interconnection layer; a passivation layer disposed on the interconnection layer, in which the interconnection layer and the passivation layer defined at least one opening; at least one elastic bump disposed on the interconnection layer, in which a portion of the elastic bump is embedded in the opening; and a conductive layer disposed on the elastic bump.

A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

A package structure includes an interconnection layer; a passivation layer disposed on the interconnection layer, in which the interconnection layer and the passivation layer defined at least one opening; at least one elastic bump disposed on the interconnection layer, in which a portion of the elastic bump is embedded in the opening; and a conductive layer disposed on the elastic bump.

A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.