A metal bump structure for use in a driver IC includes a metal bump disposed on a matrix, an optional capping layer disposed on the metal bump to completely cover the metal bump and a protective layer disposed on the metal bump to completely cover and protect the metal bump or the optional capping layer and so that the metal bump is not exposed to an ambient atmosphere. The protective layer or the optional capping layer may have a fringe disposed on the matrix.

A metal bump structure for use in a driver IC includes a metal bump disposed on a matrix, an optional capping layer disposed on the metal bump to completely cover the metal bump and a protective layer disposed on the metal bump to completely cover and protect the metal bump or the optional capping layer and so that the metal bump is not exposed to an ambient atmosphere. The protective layer or the optional capping layer may have a fringe disposed on the matrix.

A method of forming an integrated circuit device includes forming a bump structure on a substrate, wherein the bump structure has a top surface and a sidewall surface, and the substrate has a surface region exposed by the bump structure. The method further includes depositing a non-metal protection layer on the top surface and the sidewall surface of the bump structure and the surface region of the substrate. The method further includes removing the non-metal protection layer from the top surface of the bump structure, wherein a remaining portion of the non-metal protection layer forms an L-shaped protection structure, and a top surface of the remaining portion of the non-metal protection layer is farther from the substrate than a top surface of the bump structure.

A semiconductor package includes a package substrate including wirings having a plurality of pad patterns that respectively extend such that at least a portion of each of the pad patterns is exposed in at least one pad open region, a semiconductor chip mounted on the chip mounting region of the package substrate by a plurality of conductive bumps, and a sealing member on the semiconductor chip on the package substrate. Each of the plurality of pad patterns includes a main line extending in a first direction away from one side of the pad open region, and a branch line extending in a second direction different from the first direction from an end portion of the main line or from a position laterally spaced apart from the end portion of the main line.

A semiconductor package is provided. The semiconductor package includes: a first stack including a first semiconductor substrate; a through via that penetrates the first semiconductor substrate in a first direction; a second stack that includes a second face facing a first face of the first stack, on the first stack; a first pad that is in contact with the through via, on the first face of the first stack; a second pad including a concave inner side face that defines an insertion recess, the second pad located on the second face of the second stack; and a bump that connects the first pad and the second pad, wherein the bump includes a first upper bump on the first pad, and a first lower bump between the first upper bump and the first pad.

A copper pillar bump (CPB) structure, including a passivation layer covering a substrate and exposing a pad and a copper pillar on the passivation layer and the pad and connecting directly with the pad, wherein a horizontal cross-section of the copper pillar is circle. The copper pillar is provided with an upper part and a lower part, and an upper surface of the lower part includes a first upper surface and a second upper surface. The second upper surface is on one side of the first upper surface, a horizontal cross-section of the second upper surface of the lower part is two diagonally opposite quarter circles, and the upper part of the copper pillar is on the first upper surface of the lower part. A metal bump is on the copper pillar, wherein parts of the metal bump directly contact the second upper surface of the lower part.

A method of manufacturing a copper pillar bump structure, including forming a 1st photoresist on a passivation layer, wherein 1st photoresist has a 1st copper pattern exposing a bonding pad, performing a 1st electroplating process using 1st photoresist as mask to form a lower copper pillar connecting the bonding pad, forming a 2nd photoresist on the passivation layer, wherein 2nd photoresist has a 2nd copper pillar pattern exposing parts of the lower copper pillar, performing a 2nd electroplating process using 2nd photoresist as mask to form an upper copper pillar connecting with the lower copper pillar, forming a 3rd photoresist on the passivation layer, wherein 3rd photoresist has a metal pattern exposing the upper copper pillar and parts of the lower copper pillar, and performing a 3rd electroplating process using 3rd photoresist as mask to form a metal bump on the upper copper pillar and the lower copper pillar.

A copper pillar bump (CPB) structure, including a passivation layer covering a substrate and exposing a pad and a copper pillar on the passivation layer and the pad and connecting directly with the pad, wherein a horizontal cross-section of the copper pillar is circle. The copper pillar is provided with an upper part and a lower part, and an upper surface of the lower part includes a first upper surface and a second upper surface. The second upper surface is on one side of the first upper surface, a horizontal cross-section of the second upper surface of the lower part is quarter circle, and the upper part of the copper pillar is on the first upper surface of the lower part. A metal bump is on the copper pillar, wherein parts of the metal bump directly contact the second upper surface of the lower part.

A copper pillar bump (CPB) structure, including a passivation layer covering a substrate and exposing a pad and a copper pillar on the passivation layer and the pad and connecting directly with the pad, wherein a horizontal cross-section of the copper pillar is circle. The copper pillar is provided with an upper part and a lower part, and an upper surface of lower part includes a first upper surface and a second upper surface. The second upper surface is on one side of first upper surface, horizontal cross-sections of second upper surface and first upper surface are a minor area and a major area of the circle respectively, and the upper part of the copper pillar is on the first upper surface of the lower part. A metal bump is on the copper pillar, wherein parts of the metal bump directly contact the second upper surface of the lower part.

A method for fabricating a semiconductor package may include: providing a first stack including a first pad; forming a lower bump including a first metal on the first pad; forming an upper bump including a second metal different from the first metal on the lower bump, wherein a Young's modulus of the second metal is lower than a Young's modulus of the first metal, and a melting point of the second metal is 400 degrees Celsius or higher; providing a second stack including a second pad, wherein the second pad includes a concave inner face defining an insertion recess; and bonding the first stack and the second stack by inserting the upper bump into the insertion recess of the second pad.