A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 μm or less.

A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 μm or less.

An electronic device has a plurality of integrated circuits fixed to a support between transmitting and receiving antennas. An integrated circuit generates a synchronization signal supplied to the other integrated circuits. Each integrated circuit is formed in a die integrating electronic components and overlaid by a connection region according to the Flip-Chip Ball-Grid-array or embedded Wafer Level BGA. A plurality of solder balls for each integrated circuit is electrically coupled to the electronic components and bonded between the respective integrated circuit and the support. The solder balls are arranged in an array, aligned along a plurality of lines parallel to a direction, wherein the plurality of lines comprises an empty line along which no solder balls are present. A conductive synchronization path is formed on the support and extends along the empty line of at least one integrated circuit, between the solder balls of the latter.

An integrated circuit includes a semiconductor substrate, electronic components integrated in the semiconductor substrate, an electric connection structure overlying the semiconductor substrate, and an conductive region, with elongated shaped, having a first and a second end. The conductive region is formed in the electric connection structure, extends over an entire length of the substrate and is not directly electrically connected to the electronic components. A first and a second synchronization connection element are electrically coupled to the first end and to the second end, respectively, of the conductive region and have each a respective synchronization connection portion facing the coupling face.

A semiconductor device includes a semiconductor substrate including a principal surface parallel to a plane defined by a first direction and a second direction substantially orthogonal to the first direction, and the principal surface having a first side parallel to the first direction; first unit transistors, each amplifying a first signal in a first frequency band to output a second signal; and second unit transistors, each amplifying the second signal to output a third signal and aligned in the second direction between the first side and a substrate center line in the first direction in plan view of the principal surface. A first center line in the first direction of a region in which the first unit transistors are aligned is farther from the first side than a second center line in the first direction of a region in which the second unit transistors are aligned.

An example apparatus includes a semiconductor die including a bond pad; a conductive post on the bond pad; a solder joint electrically connecting the conductive post to a substrate; and ink residue of solder mask material surrounding a portion of the solder joint, the ink residue covering a portion of the substrate. Methods for forming the apparatus are disclosed.

A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 m or less.

A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 m or less.

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a die structure including a plurality of die regions and a plurality of first seal rings. Each of the plurality of first seal rings surrounds a corresponding die region of the plurality of die regions. The semiconductor device further includes a second seal ring surrounding the plurality of first seal rings and a plurality of connectors bonded to the die structure. Each of the plurality of connectors has an elongated plan-view shape. A long axis of the elongated plan-view shape of each of the plurality of connectors is oriented toward a center of the die structure.

A semiconductor device includes a semiconductor substrate including a principal surface parallel to a plane defined by a first direction and a second direction substantially orthogonal to the first direction, and the principal surface having a first side parallel to the first direction; first unit transistors, each amplifying a first signal in a first frequency band to output a second signal; and second unit transistors, each amplifying the second signal to output a third signal and aligned in the second direction between the first side and a substrate center line in the first direction in plan view of the principal surface. A first center line in the first direction of a region in which the first unit transistors are aligned is farther from the first side than a second center line in the first direction of a region in which the second unit transistors are aligned.