A second lead frame is set onto a conductive layer and a busbar. The second lead frame has holes previously formed at opposite ends thereof, and pieces of solder material or solder pieces are inserted into the holes. Then, the solder pieces are vibrated by an ultrasonically vibrating tool, whereby the solder pieces are melted without having a high temperature. The second lead frame is thus bonded to the conductive layer and the busbar. A semiconductor element and the busbar are connected by a first lead frame and the second lead frame. The connection structure thereof is such that the second lead frame to be bonded by ultrasonic bonding or other bonding methods is not directly in contact with the semiconductor element, which eliminates the risk of damage to the semiconductor element.

A power semiconductor module arrangement comprises a substrate comprising a dielectric insulation layer, and a first metallization layer attached to the dielectric insulation layer, at least one semiconductor body mounted on the first metallization layer, and a first layer comprising an encapsulant, the first layer being arranged on the substrate and covering the first metallization layer the at least one semiconductor body, wherein the first layer is configured to release liquid or oil at temperatures exceeding a defined threshold temperature.

The ringing of a switching waveform of a semiconductor device is restrained. For example, an interconnect (L5) is laid which functions as a source of a power transistor (Q3) and a cathode of a diode (D4), and further functioning as a drain of a power transistor (Q4) and an anode of a diode (D3). In other words, a power transistor and a diode coupled to this power transistor in series are formed in the same semiconductor chip; and further an interconnect functioning as a drain of the power transistor and an interconnect functioning as an anode of the diode are made common to each other. This structure makes it possible to decrease a parasite inductance between the power transistor and the diode coupled to each other in series.

The ringing of a switching waveform of a semiconductor device is restrained. For example, an interconnect (L5) is laid which functions as a source of a power transistor (Q3) and a cathode of a diode (D4), and further functioning as a drain of a power transistor (Q4) and an anode of a diode (D3). In other words, a power transistor and a diode coupled to this power transistor in series are formed in the same semiconductor chip; and further an interconnect functioning as a drain of the power transistor and an interconnect functioning as an anode of the diode are made common to each other. This structure makes it possible to decrease a parasite inductance between the power transistor and the diode coupled to each other in series.

Provided is a semiconductor device stabilizing bond properties between an electrode terminal provided on a case and an internal wiring connected to a semiconductor element. A semiconductor device includes a base part, a semiconductor element, an electrode terminal, an insulating block, and an internal wiring. The semiconductor element is mounted on the base part. The electrode terminal is held by a case surrounding an outer periphery of the semiconductor element. An end portion of the electrode terminal protrudes toward an inner side of the case. The insulating block is provided on the base part between the semiconductor element and the case. In the internal wiring, one end portion is bonded to the end portion of the electrode terminal on the insulating block, and part of a region extending from the one end portion to the other end portion is bonded to the semiconductor element.

Provided is a semiconductor device stabilizing bond properties between an electrode terminal provided on a case and an internal wiring connected to a semiconductor element. A semiconductor device includes a base part, a semiconductor element, an electrode terminal, an insulating block, and an internal wiring. The semiconductor element is mounted on the base part. The electrode terminal is held by a case surrounding an outer periphery of the semiconductor element. An end portion of the electrode terminal protrudes toward an inner side of the case. The insulating block is provided on the base part between the semiconductor element and the case. In the internal wiring, one end portion is bonded to the end portion of the electrode terminal on the insulating block, and part of a region extending from the one end portion to the other end portion is bonded to the semiconductor element.

An apparatus includes a package, a wall and a lid. The package may be configured to mount two chips configured to generate one or more signals in a millimeter-wave frequency range. The wall may be formed between the two chips. The wall generally has a plurality of conductive arches that attenuate an electromagnetic coupling between the two chips in the millimeter-wave frequency range. The lid may be configured to enclose the chips to form a cavity.

An apparatus includes a package, a wall and a lid. The package may be configured to mount two chips configured to generate one or more signals in a millimeter-wave frequency range. The wall may be formed between the two chips. The wall generally has a plurality of conductive arches that attenuate an electromagnetic coupling between the two chips in the millimeter-wave frequency range. The lid may be configured to enclose the chips to form a cavity.

A solder alloy is providing, the solder alloy including zinc, aluminum, magnesium and gallium, wherein the aluminum constitutes by weight 8% to 20% of the alloy, the magnesium constitutes by weight 0.5% to 20% of the alloy and the gallium constitutes by weight 0.5% to 20% of the alloy, the rest of the alloy including zinc.

A packaged device has a die of semiconductor material bonded to a support. An electromagnetic shielding structure surrounds the die and is formed by a grid structure of conductive material extending into the support and an electromagnetic shield, coupled together. A packaging mass embeds both the die and the electromagnetic shield. The electromagnetic shield is formed by a plurality of metal ribbon sections overlying the die and embedded in the packaging mass. Each metal ribbon section has a thickness-to-width ratio between approximately 1:2 and approximately 1:50.