A circuit device comprises a circuit board and a plurality of leads each comprising an island portion, a bonding portion elevated from the island portion, and an oblique slope portion connecting the island portion and the bonding portion, and a plurality of circuit elements mounted on the island portions so as to be connected to corresponding bonding portions through wirings. Two leads are adapted to be connected to positive and negative electrodes of a direct-current power source, and yet another lead is an output lead adapted to output alternating-current power. One electrode provided on a transistor mounted on an island portion of the second input lead is connected to a bonding portion of the output lead through a wiring, and another electrode provided on a transistor mounted on an island portion of the output lead is connected to a bonding portion of the first input lead through a wiring.

A circuit device comprises a circuit board and a plurality of leads each comprising an island portion, a bonding portion elevated from the island portion, and an oblique slope portion connecting the island portion and the bonding portion, and a plurality of circuit elements mounted on the island portions so as to be connected to corresponding bonding portions through wirings. Two leads are adapted to be connected to positive and negative electrodes of a direct-current power source, and yet another lead is an output lead adapted to output alternating-current power. One electrode provided on a transistor mounted on an island portion of the second input lead is connected to a bonding portion of the output lead through a wiring, and another electrode provided on a transistor mounted on an island portion of the output lead is connected to a bonding portion of the first input lead through a wiring.

A semiconductor device, including a substrate having an insulating layer and a plurality of circuit patterns formed on the insulating layer, the substrate having a principal surface on which an element region is set. The semiconductor device further includes a plurality of semiconductor elements provided on the plurality of circuit patterns in the element region, a plurality of main terminals that each have a first end joined to one of the plurality of circuit patterns in the element region and a second end extending out of the substrate from a first side of the substrate, a plurality of control terminals disposed in a control region that is adjacent to a second side of the substrate opposite the first side, and a sealing member that seals the principal surface and the control region.

A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element.

A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element.

A method for processing an ultra-high density interconnect wire under light source guidance, comprising preparing a photo-thermal response conductive paste, and putting it into an air pressure injector; driving the air pressure injector; the air pressure injector extrudes the photo-thermal response conductive paste, so that the photo-thermal response conductive paste is connected with the first chip to form an interconnection wire; stopping extruding the photo-thermal response conductive paste, and driving the air pressure injector to pull off the interconnection wire; a linear light source emits light and irradiates on the interconnection wire to bend to an upper side of a second chip bonding pad; an extrusion mechanism presses a free end of the interconnection wire on the second chip bonding pad; the first chip and the second chip are subjected to glue dripping encapsulation.

A semiconductor device includes: a first semiconductor integrated circuit including at least a first terminal and a second terminal; a first lead frame connected to the first terminal; a second lead frame connected to the second terminal; and a mold resin covering the first semiconductor integrated circuit. The mold resin further covers the first lead frame with a portion of the first lead frame being exposed. The mold resin further covers the second lead frame with a tip of the second lead frame opposite to the second terminal being exposed. The mold resin includes a recess, and the recess is opened to expose only the portion and the mold resin.

A semiconductor device includes: a first semiconductor integrated circuit including at least a first terminal and a second terminal; a first lead frame connected to the first terminal; a second lead frame connected to the second terminal; and a mold resin covering the first semiconductor integrated circuit. The mold resin further covers the first lead frame with a portion of the first lead frame being exposed. The mold resin further covers the second lead frame with a tip of the second lead frame opposite to the second terminal being exposed. The mold resin includes a recess, and the recess is opened to expose only the portion and the mold resin.

This wire bonding apparatus has a capillary, a movement mechanism moving the capillary, and a control unit controlling driving of the movement mechanism. The control unit at least causes execution of: a first process (trajectory a) of lowering the capillary, after a FAB is formed, to pressure bonding height at a first bonding point to form a pressure bonded ball and a column part at the first bonding point; a second process (trajectory b) of moving the capillary horizontally at the pressure bonding height after execution of the first process to scarp off the column part by the capillary; and a third process (trajectory c-k) of repeating a pressing operation at least once after execution of the second process, the pressing operation involving moving the capillary forward and lowering the capillary temporarily during movement so that the capillary presses down on a wire portion positioned over the pressure bonded ball.

Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.