H01L2224/48155

High power laminate RF package
11791251 · 2023-10-17 · ·

The present disclosure relates to a package capable of handling high radio frequency (RF) power, which includes a carrier, a ring structure attached to a top surface of the carrier, an RF die attached to the top surface of the carrier within an opening of the ring structure and electrically connected to the ring structure, a heat spreader attached to a top surface of the ring structure, and an output signal lead configured to send out RF output signals generated by the RF die. Herein, the heat spreader covers a portion of the top surface of the ring structure at an output side of the package, and the output signal lead is attached to a top surface of the heat spreader. As such, the RF output signals are capable of being transmitted from the RF die to the output signal lead through the ring structure and the heat spreader.

Semiconductor module, power semiconductor module, and power electronic equipment using the semiconductor module or the power semiconductor module

The semiconductor module includes: a heat dissipation board including first to third wiring patterns; a first metal plate on the first wiring pattern, a second metal plate on the second wiring pattern, a first semiconductor chip and a first intermediate board which are on the first metal plate, a second semiconductor chip and a second intermediate board which are on the second metal plate. A first metal film on the first intermediate board is electrically connected to the first semiconductor chip and the second metal plate, and a second metal film on the second intermediate board is electrically connected to the second semiconductor chip and the third wiring pattern.

POWER MODULE AND METHOD FOR MANUFACTURING SAME
20230369195 · 2023-11-16 ·

Disclosed are a power module and a method for manufacturing the same. A power module according to an embodiment of the present disclosure includes: a first substrate; a second substrate disposed spaced apart from the first substrate and including at least one metal layer; at least one chip disposed between the first substrate and the second substrate and in electrical contact with the metal layer; and a third substrate configured to be disposed spaced apart from the first substrate and the second substrate, electrically connect the chip and at least one external input terminal, include one or more conductive patterns each of which is connected to one of the at least one lead frame, and be formed in a multi-layer structure such that the one or more conductive patterns are not short-circuited to each other.

Power Semiconductor Module Arrangements and Methods for Producing Power Semiconductor Module Arrangements
20230343681 · 2023-10-26 ·

A power semiconductor module arrangement includes a housing that includes sidewalls, a lid, protrusions, a substrate, a plurality of components arranged on the substrate, and an encapsulant partly filling the interior of the housing, thereby covering the substrate, wherein each of the protrusions extends from the lid of the housing, a lower end of the protrusions is arranged directly on one of the components, or within a defined radius around one of the components, and wherein the lower end of a protrusion is the end facing away from the lid and towards the substrate, and the encapsulant has a generally flat surface and forms one or more elevations, wherein each of the elevations encloses an upper end of a different one of the components, and encloses the lower end of a respective one of the protrusions.

SEMICONDUCTOR MODULE
20230343770 · 2023-10-26 · ·

A semiconductor module includes a mounting substrate, a transistor mounted on the mounting substrate, a housing configured to house a semiconductor element, a first sealing layer filled in a space inside the housing to seal the transistor, a second sealing layer of a resin material softer than the first sealing layer and layered on the first sealing layer, and a wire electrically connected to the transistor, in which the wire includes a first portion covered with the first sealing layer and a second portion covered with the second sealing layer.

HEAT SINK, SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR MODULE

Provided is a heat sink having a clad structure of Co—Mo composite materials and Cu materials, satisfying high heat-sink properties required of the heat sink for use in a semiconductor package with a frame on which a high-output and small-sized semiconductor is mounted, and preventing, when applied to the semiconductor package with a frame, crack of the frame due to local stress concentration. The heat sink has three or more Cu layers and two or more Cu—Mo composite layers alternately stacked in a thickness direction so that the Cu layers are outermost layers on both sides thereof, the Cu layers as the outermost layers each having a thickness t.sub.1 of 40 μm or more, the heat sink satisfying 0.06≤t.sub.1/T≤0.27 (where T: heat sink thickness) and t.sub.2/T≤0.36/[(total number of layers−1)/2] (where t.sub.2: Cu—Mo composite layer thickness, the total number of layers: sum of numbers of Cu layers and Cu—Mo composite layers).

Copper wire bond solution for reducing thermal stress on an intermittently operable chipset controlling RF application for cooking

Power amplifier electronics for controlling application of radio frequency (RF) energy generated using solid state electronic components may further be configured to control application of RF energy in cycles between high and low powers. The power amplifier electronics may include a semiconductor die on which one or more RF power transistors are fabricated, an output matching network configured to provide impedance matching between the semiconductor die and external components operably coupled to an output tab, and bonding wires bonded at terminal ends thereof to operably couple the one or more RF power transistors of the semiconductor die to the output matching network. The bonding wires may be copper bonding wires having a diameter of between about 10 microns and about 100 microns.

EMBEDDED COPPER STRUCTURE FOR MICROELECTRONICS PACKAGE
20220238482 · 2022-07-28 ·

An electronic component and a method of manufacturing an electronic component, the method including surface mounting electronic components to a printed circuit board (PCB), applying a flip-chip die integrated circuit (IC) to the PCB and underfilling the flip-chip IC to secure the PCB. The method also includes sintering a copper block to the PCB, where the copper block is in thermal communication with the IC and acts as a thermal path for removing heat generated by the flip-chip IC.

Semiconductor package structure including an encapsulant having a cavity exposing an interposer

A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a carrier, a first encapsulant, and an interposer. The first encapsulant is on the carrier and defines a cavity. The interposer is disposed between the first encapsulant and the cavity. The first encapsulant covers a portion of the interposer.

LIGHT-EMITTING DEVICE
20220102332 · 2022-03-31 ·

A light-emitting device includes first and second light-emitting elements, first and second support members bonded to the first and second light-emitting elements, respectively, first and second protective elements, and a plurality of wirings including: a first wiring with one end being bonded to the first light-emitting element or the first support member; a second wiring with one end being bonded to the first light-emitting element or the first support member and the other end being bonded to the second light-emitting element or the second support member; a third wiring with one end being bonded to the first protective element or a support member equipped with the first protective element; and a fourth wiring with one end being bonded to the second protective element or a support member equipped with the second protective element.