A semiconductor device includes a laminated body, a semiconductor element, and a cooler. The laminated body includes a first conductor layer, a first insulator layer, a second conductor layer, a second insulator layer, and a third conductor layer. The first conductor layer, the first insulator layer, the second conductor layer, the second insulator layer and the third conductor layer are laminated. The first insulator layer is arranged between the first conductor layer and the second conductor layer, and electrically insulates the first conductor layer from the second conductor layer. The second insulator layer is arranged between the second conductor layer and the third conductor layer, and electrically insulates the third conductor layer from the second conductor layer. The semiconductor element is mounted on the first conductor layer. The cooler is connected to the third conductor layer.

Disclosed is a package for a semiconductor device including a semiconductor die. The package includes a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess in its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.

A semiconductor device includes: a semiconductor chip; a case having a frame portion that has an inner wall portion surrounding an housing area in which the semiconductor chip is disposed; a buffer member provided on at last part of the inner wall portion of the case on a side of the housing area; a low expansion member provided on said at least part of the inner wall portion with the buffer member interposed therebetween on the side of the housing area; and a sealing member that seals the housing area, wherein the buffer member has a smaller elastic modulus than the case and the sealing member, and wherein the low expansion member has a smaller linear expansion coefficient than the case and the sealing member.

According to the present disclosure, a method of manufacturing a semiconductor device includes the steps of (a) preparing a lead frame including a switching element die pad, a control element die pad, and a third-side side rail portion, (b) mounting a switching element and a diode element on the switching element die pad and mounting a control element configured to control the switching element on the control element die pad, (c) sealing the switching element, the diode element, and the control element with a mold resin such that the power side terminal, the control side terminal, and a part of the third-side side rail portion protrude outward, and (d) forming a third-side side rail terminal by cutting the third-side side rail portion, the third-side side rail terminal extending from a part of the third-side side rail portion.

A temporary protective film for semiconductor encapsulation molding, the temporary protective film including a support film, an adhesive layer provided on one surface of the support film, and a non-adhesive layer provided on a surface of the support film on an opposite side from the surface provided with the adhesive layer. The thickness of the non-adhesive layer is 10 μm or less. A surface of the non-adhesive layer on an opposite side of a surface in contact with the support film, has a surface roughness Ra of 0.1 μm or more.

Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.

In a described example, an apparatus includes: a package substrate having a die pad configured for mounting a semiconductor die, a first lead connected to the die pad, and a second lead spaced from and electrically isolated from the die pad; a spacer dielectric mounted on the die pad; a semiconductor die including a temperature sensor mounted on the spacer dielectric; electrical connections coupling the semiconductor die to the second lead; and mold compound covering the semiconductor die, the die pad, the electrical connections, and a portion of the package substrate, with portions of the first lead and portions of the second lead exposed from the mold compound to form terminals for a packaged temperature sensor device.

A power module is provided with a substrate, power devices, and a housing. The power devices are mounted on device pads of the substrate and arranged to provide a power circuit having a first input, a second input, and at least one output. First and second power terminals provide first and second inputs for the power circuit. At least one output power terminal provides at least one output. The housing encompasses the substrate, the power devices, and portions of the first and second input power terminals as well as the at least one output power terminal. The first and second input power terminals extend out of a first side of the housing, and the at least one output power terminal extends out of a second side of the housing, the first side being opposite the second side.

The semiconductor device includes a semiconductor element, a first lead, and a second lead. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a thickness direction. The semiconductor element includes an electron transit layer disposed between the element obverse surface and the element reverse surface and formed of a nitride semiconductor, a first electrode disposed on the element obverse surface, and a second electrode disposed on the element reverse surface and electrically connected to the first electrode. The semiconductor element is mounted on the first lead, and the second electrode is joined to the first lead. The second lead is electrically connected to the first electrode. The semiconductor element is a transistor. The second lead is spaced apart from the first lead and is configured such that a main current to be subjected to switching flows therethrough.

A device that includes a metal submount; a first transistor die arranged on said metal submount; a second transistor die arranged on said metal submount; a set of primary interconnects; and a set of secondary interconnects. Additionally, the set of primary interconnects and the set of secondary interconnects are configured to provide RF signal coupling between the first transistor die and the second transistor die by electromagnetic coupling.