A device includes: a surface mount device carrier configured to be mounted to a metal submount of a transistor package, said surface mount device carrier includes an insulating substrate includes a top surface and a bottom surface and a first pad and a second pad arranged on a top surface of said surface mount device carrier; at least one surface mount device includes a first terminal and a second terminal, said first terminal of said surface mount device mounted to said first pad and said second terminal mounted to said second pad; and at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by said insulating substrate, where at least one of the first pad and the second pad are configured as wire bond pads.

A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure including a source terminal connected to said substrate; a bond pad providing a connection to the transistor structure configured to receive a bond wire; wherein the semiconductor body includes an RF-return current path for carrying return current associated with said bond wire, said RF-return current path comprising a strip of metal arranged on said body, said strip configured such that it extends beneath said bond pad and is connected to said source terminal of the transistor structure.

An integrated circuit device includes a first substrate having a ground plane. The integrated circuit device also includes a second substrate. The second substrate has a first layer of passive devices. The passive devices include at least one inductor on a first side of the second substrate. The first layer of passive devices is substantially orthogonal to the ground plane and the second substrate supported by the first substrate. An inductor magnetic field is substantially parallel to the ground plane.

Provided is an electronic package, including: a carrier, an electronic component disposed on the carrier, and an antenna structure, wherein the antenna structure has a plurality of spacing members and at least one wire connected among the spacing members. No additional layout area is required to be formed on a surface of the carrier, such that the objective of miniaturization can be achieved.

A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells, an RF input lead coupled to the plurality of RF transistor cells, an RF output lead, and an output matching network coupled between the plurality of RF transistor cells and the RF output lead. The output matching network includes a plurality of capacitors having respective upper capacitor plates, wherein the upper capacitor plates of the capacitors are coupled to output terminals of respective ones of the RF transistor cells. The plurality of capacitors may be provided as a capacitor block that includes a common reference capacitor plate and a dielectric layer on the reference capacitor plate. The upper capacitor plates may be on the dielectric layer.

In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.

A multi-chip isolation (ISO) device package includes a leadframe including leads, an interposer substrate including a top copper layer and a bottom metal layer, with a dielectric layer in-between. A first IC die and a second IC die include circuitry including a transmitter or a receiver, and first and second bond pads are both attached top side up in the package. A laminate transformer is attached to the top copper layer positioned lateral to the IC die. Bondwires wirebond the first bond pads to first pads on the laminate transformer and to a first group of the leads or the lead terminals, and bondwires wirebond the second bond pads to second pads on the laminate transformer and to a second group of the leads or the lead terminals. A mold compound provides encapsulation.

The present disclosure relates to a hermetic package with improved RF stability and performance. The package includes a carrier, a bottom dielectric ring over the carrier, a bottom metal layer over the bottom dielectric ring, a top dielectric ring over the bottom metal layer, a top metal layer over the top dielectric ring, an exterior plated layer, and multiple top vias. Herein, the bottom metal layer includes signal sections and at least one ground section, which is electrically isolated from the signal sections. The exterior plated layer covers at least a portion of a first exterior sidewall of the bottom ring structure and electrically couples the carrier to the at least one ground section. The multiple top vias extend through the top dielectric ring and electrically couple the top metal layer to the at least one ground section.

A packaged Radio Frequency power transistor device is described, which comprises a component carrier a die comprising a semiconductor transistor having a source, a gate and a drain, wherein the die is mounted at the component carrier, a ground connection being electrically connected to the source, an output lead being electrically connected to the drain, a resonance circuit being electrically inserted between the output lead and the ground connection, and a video lead being electrically connected to the resonance circuit. The video lead is configured for being connected to a first contact of a decoupling capacitor. The ground connection is configured for being connected to a second contact of the decoupling capacitor. It is further described a RF power amplifier comprising such a packaged Radio Frequency power transistor device.

A die interconnect system having a first die with a plurality of connection pads, and a ribbon lead extending from the first die, the ribbon lead having a plurality of metal cores with a core diameter, and a dielectric layer surrounding the metal core with a dielectric thickness, with at least a portion of dielectric being fused between adjacent metal cores along the length of the plurality of metal cores, and an outer metal layer attached to ground.