A bonding apparatus includes a body part; a vacuum hole disposed in the body part; a first protruding part protruding in a first direction from a first surface of the body part; a second protruding part protruding from the first surface of the body part in the first direction and spaced farther apart from a center of the first surface of the body part than the first protruding part in a second direction intersecting with the first direction; and a trench defined by the first surface of the body part and second surfaces of the first protruding part, the second surfaces protruding in the first direction from the first surface of the body part, and the trench being connected to the vacuum hole, wherein the second protruding part protrudes farther from the first surface of the body part in the first direction than the first protruding part.

A semiconductor device includes an insulated circuit board having a conductive pattern layer, a sintered member disposed on the conductive pattern layer, a semiconductor chip placed on the sintered member, and a coating material covering the semiconductor chip. The sintered member has, on a surface thereof opposite to the conductive pattern layer, a frame shaping the outer edge of a recess. The semiconductor chip is mounted in the recess such that its top face is located closer to the conductive pattern layer than a top end of the frame.

An industrial-scale system and method for handling precisely aligned and centered semiconductor substrate (e.g., wafer) pairs for substrate-to-substrate (e.g., wafer-to-wafer) aligning and bonding applications is provided. Some embodiments include an aligned substrate transport device having a frame member and a spacer assembly. The centered semiconductor substrate pairs may be positioned within a processing system using the aligned substrate transport device, optionally under robotic control. The centered semiconductor substrate pairs may be bonded together without the presence of the aligned substrate transport device in the bonding device. The bonding device may include a second spacer assembly which operates in concert with that of the aligned substrate transport device to perform a spacer hand-off between the substrates. A pin apparatus may be used to stake the substrates during the hand-off.

A chip-stacking apparatus for stacking a chip on a substrate is provided. The chip-stacking apparatus includes a substrate support configured to carry the substrate and a transport device configured to dispose a chip to the substrate. The transport device includes a bond head including a bond base and an attaching element disposed on the bond base and configured to allow the chip to be attached thereon. The center area of the attaching element is higher than an edge area of the attaching element relative to the bond base.

A heat assisted flip chip bonding apparatus includes a semiconductor assembly having a substrate and a chip, a heating source and a press and cover assembly having a cover element and press elements. The chip is disposed above the substrate and includes conductors which contact with conductive pads on the substrate. The heating source is provided to emit a heated light which illuminates the chip via an opening of the cover element. The press elements are located between the cover element and the semiconductor assembly and each includes an elastic unit and a pressing unit. Both ends of the elastic unit are connected to the cover element and the pressing unit respectively, and the pressing unit is provided to press a back surface of the chip.

A printed electrical connection structure includes a substrate having one or more electrical connection pads and a micro-transfer printed component having one or more connection posts. Each connection post is in electrical contact with a connection pad. A resin is disposed between and in contact with the substrate and the component. The resin has a reflow temperature less than a cure temperature. The resin repeatedly flows at the reflow temperature when temperature-cycled between an operating temperature and the reflow temperature but does not flow after the resin is exposed to a cure temperature. A solder can be disposed on the connection post or the connection pad. After printing and reflow, the component can be tested and, if the component fails, another component is micro-transfer printed to the substrate, the resin is reflowed again, the other component is tested and, if it passes the test, the resin is finally cured.

A production of voids between substrates is prevented when the substrates are bonded together, and the substrates are bonded together at a high positional precision while suppressing a strain. A method for bonding a first substrate and a second substrate includes a step of performing hydrophilization treatment to cause water or an OH containing substance to adhere to bonding surface of the first substrate and the bonding surface of the second substrate, a step of disposing the first substrate and the second substrate with the respective bonding surfaces facing each other, and bowing the first substrate in such a way that a central portion of the bonding surface protrudes toward the second substrate side relative to an outer circumferential portion of the bonding surface, a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate at the respective central portions, and a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate across the entirety of the bonding surfaces, decreasing a distance between the outer circumferential portion of the first substrate and an outer circumferential portion of the second substrate with the respective central portions abutting each other at a pressure that maintains a non-bonded condition.

A bonding head for performing a thermal compression process including a base body. A bonding heater is disposed on the base body that generates a melting heat. A bonding tool is disposed on the bonding heater that compresses a bonding object against a bonding base while transferring the melting heat to the bonding object to thereby bond the bonding object to the bonding base by the thermal compression process. A heat controller is disposed at the bonding tool, and a thermal conductivity of the heat controller is less than a thermal conductivity of the bonding tool.

An apparatus for executing a direct transfer of a semiconductor device die from a first substrate to a second substrate. The apparatus includes a first substrate conveyance mechanism movable in two axes. A micro-adjustment mechanism is coupled with the first substrate conveyance mechanism and is configured to hold the first substrate and to make positional adjustments on a scale smaller than positional adjustments caused by the first substrate conveyance mechanism. The micro-adjustment mechanism includes a micro-adjustment actuator having a distal end and a first substrate holder frame that is movable via contact with the distal end of the micro-adjustment actuator. A second frame is configured to secure the second substrate such that a transfer surface is disposed facing the semiconductor device die disposed on a surface of the first substrate. A transfer mechanism is configured to press the semiconductor device die into contact with the transfer surface of the substrate.

Interconnecting a first chip and a second chip by a bridge member includes a chip handler for handling the first chip and the second chip. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The chip handler has an opening and at least one support surface for supporting the first surfaces of the first chip and the second chip when the first chip and the second chip are mounted to the chip handler. A chip support member supports the first chip and the second chip from the second surfaces, and a bridge handler is provided for inserting the bridge member through the opening of the chip handler and for placing the bridge member onto the first sets of terminals of the first chip and the second chip.