A method of forming a semiconductor device includes following steps. Firstly, a substrate is provided and the substrate has a first semiconductor layer formed thereon. Next, an isolating structure is formed in the first semiconductor layer, and a sacrificial layer is formed on the first semiconductor layer by consuming a top portion of the first semiconductor layer. Then, the sacrificial layer is removed to form a second semiconductor layer, and a portion of the isolating structure is also removed to form a shallow trench isolation (STI), with a top surface of the shallow trench isolation being substantially coplanar with a top surface of the second semiconductor layer.

A fin field-effect transistor (fin-FET) includes a substrate having a plurality of discrete fin structures thereon; a chemical oxide layer on at least a sidewall of a fin structure; a doped layer containing doping ions on the chemical oxide layer; and a doped region in the fin structure containing doping ions diffused from the doping ions in the doped layer.

A method for forming a semiconductor arrangement includes forming a fin. A diffusion process is performed to diffuse a first dopant into the channel region of the fin. A first gate electrode is formed over the channel region of the fin after the first dopant is diffused into the channel region of the fin.

A method of forming a semiconductor device includes following steps. Firstly, a substrate is provided and the substrate has a first semiconductor layer formed thereon. Next, an isolating structure is formed in the first semiconductor layer, and a sacrificial layer is formed on the first semiconductor layer by consuming a top portion of the first semiconductor layer. Then, the sacrificial layer is removed to form a second semiconductor layer, and a portion of the isolating structure is also removed to form a shallow trench isolation (STI), with a top surface of the shallow trench isolation being substantially coplanar with a top surface of the second semiconductor layer.

The method for doping a semiconductor includes the following steps in the following order: separation layer deposition step, in which a separation layer is deposited on the surface of a substrate, a mixture material source layer deposition step, in which a mixture material source layer including a mixture material is deposited on the separation layer, the mixture material of the mixture material source layer including a dopant substance, and annealing the substrate, the separation layer, and the mixture material source layer in an annealing step to arrange diffusion of dopant substance from the mixture material source layer to the substrate and to the separation layer.

A method includes: forming first and second trenches in a semiconductor body; forming a first material layer on the semiconductor body in the first and second trenches such that a first residual trench remains in the first trench and a second residual trench remains in the second trench; removing the first material from the second trench; and forming a second material layer on the first material layer in the first residual trench and on the semiconductor body in the second trench. The first material layer includes dopants of a first doping type and the second material layer includes dopants of a second doping type. The method further includes diffusing dopants from the first material layer in the first trench into the semiconductor body to form a first doped region, and from the second material layer in the second trench into the semiconductor body to form a second doped region.

A semiconductor device includes a semiconductor substrate, a dielectric feature and an epitaxy feature. The epitaxy feature is on the semiconductor substrate. The epitaxy feature has a top central portion and a corner portion. The dielectric feature is closer to the corner portion than the top central portion, and the corner portion has an impurity concentration higher than that of the top central portion.

An impurity source film is formed along a portion of a non-planar semiconductor fin structure. The impurity source film may serve as source of an impurity that becomes electrically active subsequent to diffusing from the source film into the semiconductor fin. In one embodiment, an impurity source film is disposed adjacent to a sidewall surface of a portion of a sub-fin region disposed between an active region of the fin and the substrate and is more proximate to the substrate than to the active area.

A semiconductor structure includes a substrate, a vertical fin disposed over a top surface of the substrate, a first vertical transport field-effect transistor (VTFET) disposed over the top surface of the substrate surrounding a first portion of the vertical fin, an isolation layer disposed over the first VTFET surrounding a second portion of the vertical fin, and a second VTFET disposed over a top surface of the isolation layer surrounding a third portion of the vertical fin. The first portion of the vertical fin includes a first semiconductor layer with a first crystalline orientation providing a first vertical transport channel for the first VTFET, the second portion of the vertical fin includes an insulator, and the third portion of the vertical fin includes a second semiconductor layer with a second crystalline orientation providing a second vertical transport channel for the second VTFET.

What is proposed is a method of producing at least two differently heavily doped subzones (3, 5) predominantly doped with a first dopant type in a silicon substrate (1), in particular for a solar cell. The method comprises: covering at least a first subzone (3) of the silicon substrate (1) in which a heavier doping with the first dopant type is to be produced with a doping layer (7) of borosilicate glass, wherein at least a second subzone (5) of the silicon substrate (1) in which a lighter doping with the first dopant type is to be produced is not covered with the doping layer (7), and wherein boron as a dopant of a second dopant type differing from the first dopant type and oppositely polarized with respect to the same is included in the layer (7), and; heating the such prepared silicon substrate (1) to temperatures above 300 C., preferably above 900 C., in a furnace in an atmosphere containing significant quantities of the first dopant type. Additionally, at least a third doped subzone (15) doped with the second dopant type may be produced by the method additionally comprising, prior to the heating, a covering of the doping layer (7), above the third doped subzone (15) to be produced, with a further layer (17) acting as a diffusion barrier for the first dopant type. The method uses the observation that a borosilicate glass layer seems to promote an in-diffusion of phosphorus from a gas atmosphere and may substantially facilitate a manufacturing for example of solar cells, in particular back contact solar cells.