A transistor includes a substrate, a drift layer on the substrate, and a junction implant in the drift layer opposite the substrate. The junction implant includes a body well and a source well within the body well. A source contact is in electrical contact with the source well and the body well. A drain contact is in electrical contact with the substrate. A gate insulator is on the drift layer and over a portion of the body well and the source well. A gate contact is on the gate insulator. A softness of a body diode between the source contact and the drain contact is greater than 0.5. By providing the transistor such that the softness factor of the body diode is greater than 0.5, the switching performance of the body diode and thus switching losses of the transistor when used in a bidirectional conduction application will be significantly reduced.

A semiconductor device includes a semiconductor layer having a main surface in which a trench is formed, a first-conductivity-type body region formed along a sidewall of the trench in a surface layer portion of the main surface of the semiconductor layer, a second-conductivity-type impurity region formed along the sidewall of the trench in a surface layer portion of the body region, a gate insulating layer formed on an inner wall of the trench, a gate electrode that is embedded in the trench and that faces the body region and the impurity region with the gate insulating layer placed between the gate electrode and the body region and between the gate electrode and the impurity region, a contact electrode that passes through the sidewall of the trench from inside the trench and is drawn out to the surface layer portion of the main surface of the semiconductor layer and is electrically connected to the body region and to the impurity region, and an embedded insulating layer that is interposed between the gate electrode and the contact electrode in the trench and that insulates the gate electrode and the contact electrode.

A power semiconductor device including an epitaxial layer and a fabrication method thereof are provided. A first well region and a second well region separated from each other respectively extend from a surface of the epitaxial layer into the epitaxial layer. A floating doped region is located in the epitaxial layer and between the first well region and the second well region. The floating doped region is separated from the first well region and the second well region. A first doped region and a second doped region respectively extend from the surface of the epitaxial layer into the first well region and the second well region. A gate structure is located on the epitaxial layer and is adjacent to the first doped region and the second doped region. The gate structure is at least partially overlapped with the floating doped region.

A semiconductor device includes a semiconductor layer, a first conductor disposed on the semiconductor layer, a second conductor disposed on the semiconductor layer so as to be separated from the first conductor, a relay portion that is formed on the semiconductor layer so as to straddle the first conductor and the second conductor and that is made of a semiconductor having a first conductivity type region and a second conductivity type region, a first contact by which the first conductivity type region and the second conductivity type region are electrically connected to the first conductor, and a second contact that electrically connects the first conductivity type region of the relay portion and the second conductor together and that is insulated from the second conductivity type region.

A power semiconductor device includes: a semiconductor body with a drift region; a plurality of trenches, wherein two adjacent trenches laterally confine a mesa of the semiconductor body. Each trench extends along a vertical direction and includes a trench electrode, and has a trench width along a first lateral direction and a trench length along a second lateral direction perpendicular to the first lateral direction, the trench length amounting to at least five times the trench width. The device further includes: a semiconductor body region of a second conductivity type in the mesa; a source region in the mesa; an insulation layer above and/or on the source region; a contact plug that extends at least from an upper surface of the insulation layer along the vertical direction so as to contact both the source region and the semiconductor body region.

A transistor includes a substrate, a drift layer on the substrate, and a junction implant in the drift layer opposite the substrate. The junction implant includes a body well and a source well within the body well. A source contact is in electrical contact with the source well and the body well. A drain contact is in electrical contact with the substrate. A gate insulator is on the drift layer and over a portion of the body well and the source well. A gate contact is on the gate insulator. A softness of a body diode between the source contact and the drain contact is greater than 0.5. By providing the transistor such that the softness factor of the body diode is greater than 0.5, the switching performance of the body diode and thus switching losses of the transistor when used in a bidirectional conduction application will be significantly reduced.

A semiconductor device including: a first semiconductor layer having a first conductive type; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second conductive type that is a conductive type different from the first conductive type; an impurity region of the first conductive type formed at a surface of the second semiconductor layer; first electrodes contacting the impurity region, the second semiconductor layer, and the first semiconductor layer via a first insulating film; and second electrodes contacting the first electrodes via a second insulating film, and contacting the first semiconductor layer via a third insulating film, the second electrodes including PN junctions at borders between upper portions that contact the first semiconductor layer via the third insulating film and lower portions that contact the first semiconductor layer via the third insulating film.

A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface.

A semiconductor device includes a semiconductor substrate including a drift region of a first conductivity type, a transistor portion provided in the substrate, and an adjacent element portion provided in the substrate, the adjacent element and transistor portions being arranged along an arrangement direction. The transistor and adjacent element portions both include a base region of a second conductivity type provided above the drift region, trench portions formed through the base region, extending in an extending direction orthogonal to the arrangement direction on the upper surface, and having a conducting portion therein, and a first lower surface side lifetime control region provided, on a lower surface side, continuously from the transistor portion to the adjacent element portion and includes a lifetime killer. The lifetime control region is provided over entirety of the transistor portion and in a part of the adjacent element portion in a top view of the substrate.

A power semiconductor device includes: a semiconductor body with a drift region; a plurality of trenches, wherein two adjacent trenches laterally confine a mesa of the semiconductor body. Each trench extends along a vertical direction and includes a trench electrode, and has a trench width along a first lateral direction and a trench length along a second lateral direction perpendicular to the first lateral direction, the trench length amounting to at least five times the trench width. The device further includes: a semiconductor body region of a second conductivity type in the mesa; a source region in the mesa; an insulation layer above and/or on the source region; a contact plug that extends at least from an upper surface of the insulation layer along the vertical direction so as to contact both the source region and the semiconductor body region.