A semiconductor package includes a semiconductor chip including a chip pad on a first surface thereof, an external pad electrically connected to the chip pad of the semiconductor chip, an external connection terminal covering the external pad, and an intermediate layer between the external pad and the external connection terminal, the intermediate layer including a third metal material that is different from a first metal material included in the external pad and a second metal material included in the external connection terminal.

A semiconductor package includes a semiconductor chip including a chip pad on a first surface thereof, an external pad electrically connected to the chip pad of the semiconductor chip, an external connection terminal covering the external pad, and an intermediate layer between the external pad and the external connection terminal, the intermediate layer including a third metal material that is different from a first metal material included in the external pad and a second metal material included in the external connection terminal.

A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.

A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.

A method of making a semiconductor device may include providing a carrier comprising a semiconductor die mounting site. A build-up interconnect structure may be formed over the carrier. A first portion of a conductive interconnect may be formed over the build-up interconnect structure in a periphery of the semiconductor die mounting site. An etch stop layer and a second portion of the conductive interconnect may be formed over the first portion of the conductive interconnect. A semiconductor die may be mounted to the build-up interconnect at the semiconductor die mounting site. The conductive interconnect and the semiconductor die may be encapsulated with a mold compound. A first end of the conductive interconnect on the second portion of the conductive interconnect may be exposed. The carrier may be removed to expose the build-up interconnect structure. The first portion of the conductive interconnect may be etched to expose the etch stop layer.

A method for manufacturing a semiconductor device includes forming a first metal layer above a substrate of a semiconductor chip, forming a nickel layer on the first metal layer, performing a first cleaning treatment on the nickel layer with diluted hydrochloric acid having a concentration of less than 1% by weight, forming a gold layer on the nickel layer, and connecting a bonding wire to a surface of the gold layer.

A semiconductor component may have a semiconductor body, an electrically conductive carrier layer, and an electrically poorly conductive insulation. The semiconductor body may include a first semiconductor layer and a second semiconductor layer, a first main face and a second main face, situated opposite the first main face, wherein the first main face is formed by a surface of the first semiconductor layer and the second main face is formed by a surface of the second semiconductor layer. The electrically conductive carrier layer may regionally cover the second main face the carrier layer is structured in such a way that it has at least one contact-free depression. The insulation may be located between the carrier layer and the semiconductor body and covers at least part of the second main face and extends up to at least one lateral face of the semiconductor body.

A semiconductor component may have a semiconductor body, an electrically conductive carrier layer, and an electrically poorly conductive insulation. The semiconductor body may include a first semiconductor layer and a second semiconductor layer, a first main face and a second main face, situated opposite the first main face, wherein the first main face is formed by a surface of the first semiconductor layer and the second main face is formed by a surface of the second semiconductor layer. The electrically conductive carrier layer may regionally cover the second main face the carrier layer is structured in such a way that it has at least one contact-free depression. The insulation may be located between the carrier layer and the semiconductor body and covers at least part of the second main face and extends up to at least one lateral face of the semiconductor body.

A clip, a semiconductor package, and a method are disclosed. In one example the clip includes a die attach portion having a first main face and a second main face opposite to the first main face, and at least one through-hole extending between the first and second main faces and including a curved transition from an inner wall of the at least one through-hole to the first main face.

A clip, a semiconductor package, and a method are disclosed. In one example the clip includes a die attach portion having a first main face and a second main face opposite to the first main face, and at least one through-hole extending between the first and second main faces and including a curved transition from an inner wall of the at least one through-hole to the first main face.