Patent classifications
H01L2224/05614
PACKAGED HIGH VOLTAGE MOSFET DEVICE WITH CONNECTION CLIP AND MANUFACTURING PROCESS THEREOF
An HV MOSFET device has a body integrating source conductive regions. Projecting gate structures are disposed above the body, laterally offset with respect to the source conductive regions. Source contact regions, of a first metal, are arranged on the body in electric contact with the source conductive regions, and source connection regions, of a second metal, are arranged above the source contact regions and have a height protruding with respect to the projecting gate structures. A package includes a metal support bonded to a second surface of the body, and a dissipating region, above the first surface of the semiconductor die. The dissipating region includes a conductive plate having a planar face bonded to the source connection regions and spaced from the projecting gate structures. A package mass of dielectric material is disposed between the support and the dissipating region and incorporates the semiconductor die. The dissipating region is a DBC-type insulation multilayer.
PACKAGED HIGH VOLTAGE MOSFET DEVICE WITH CONNECTION CLIP AND MANUFACTURING PROCESS THEREOF
An HV MOSFET device has a body integrating source conductive regions. Projecting gate structures are disposed above the body, laterally offset with respect to the source conductive regions. Source contact regions, of a first metal, are arranged on the body in electric contact with the source conductive regions, and source connection regions, of a second metal, are arranged above the source contact regions and have a height protruding with respect to the projecting gate structures. A package includes a metal support bonded to a second surface of the body, and a dissipating region, above the first surface of the semiconductor die. The dissipating region includes a conductive plate having a planar face bonded to the source connection regions and spaced from the projecting gate structures. A package mass of dielectric material is disposed between the support and the dissipating region and incorporates the semiconductor die. The dissipating region is a DBC-type insulation multilayer.
PACKAGED HIGH VOLTAGE MOSFET DEVICE WITH CONNECTION CLIP AND MANUFACTURING PROCESS THEREOF
An HV MOSFET device has a body integrating source conductive regions. Projecting gate structures are disposed above the body, laterally offset with respect to the source conductive regions. Source contact regions, of a first metal, are arranged on the body in electric contact with the source conductive regions, and source connection regions, of a second metal, are arranged above the source contact regions and have a height protruding with respect to the projecting gate structures. A package includes a metal support bonded to a second surface of the body, and a dissipating region, above the first surface of the semiconductor die. The dissipating region includes a conductive plate having a planar face bonded to the source connection regions and spaced from the projecting gate structures. A package mass of dielectric material is disposed between the support and the dissipating region and incorporates the semiconductor die. The dissipating region is a DBC-type insulation multilayer.
PACKAGED HIGH VOLTAGE MOSFET DEVICE WITH CONNECTION CLIP AND MANUFACTURING PROCESS THEREOF
An HV MOSFET device has a body integrating source conductive regions. Projecting gate structures are disposed above the body, laterally offset with respect to the source conductive regions. Source contact regions, of a first metal, are arranged on the body in electric contact with the source conductive regions, and source connection regions, of a second metal, are arranged above the source contact regions and have a height protruding with respect to the projecting gate structures. A package includes a metal support bonded to a second surface of the body, and a dissipating region, above the first surface of the semiconductor die. The dissipating region includes a conductive plate having a planar face bonded to the source connection regions and spaced from the projecting gate structures. A package mass of dielectric material is disposed between the support and the dissipating region and incorporates the semiconductor die. The dissipating region is a DBC-type insulation multilayer.
Photoresist cleaning composition used in photolithography and a method for treating substrate therewith
It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 ?m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.
Photoresist cleaning composition used in photolithography and a method for treating substrate therewith
It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 ?m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.
Photoresist Cleaning Composition Used in Photolithography and a Method for Treating Substrate Therewith
It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.
Photoresist Cleaning Composition Used in Photolithography and a Method for Treating Substrate Therewith
It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.