Provided is copper paste for joining including metal particles, and a dispersion medium. The metal particles include sub-micro copper particles having a volume-average particle size of 0.12 m to 0.8 m, and micro copper particles having a volume-average particle size of 2 m to 50 m, a sum of the amount of the sub-micro copper particles contained and the amount of the micro copper particles contained is 80% by mass or greater on the basis of a total mass of the metal particles, and the amount of the sub-micro copper particles contained is 30% by mass to 90% by mass on the basis of a sum of a mass of the sub-micro copper particles and a mass of the micro copper particles.

Provided is copper paste for joining including metal particles, and a dispersion medium. The metal particles include sub-micro copper particles having a volume-average particle size of 0.12 m to 0.8 m, and micro copper particles having a volume-average particle size of 2 m to 50 m, a sum of the amount of the sub-micro copper particles contained and the amount of the micro copper particles contained is 80% by mass or greater on the basis of a total mass of the metal particles, and the amount of the sub-micro copper particles contained is 30% by mass to 90% by mass on the basis of a sum of a mass of the sub-micro copper particles and a mass of the micro copper particles.

A micro-bonding structure including a substrate, a conductive pad, a bonding layer, a micro device, and a diffusive bonding portion is provided. The conductive pad is present on the substrate. The bonding layer is present on the conductive pad. The micro device is present on the bonding layer. The diffusive bonding portion is present between and electrically connected with the bonding layer and the conductive pad. The diffusive bonding portion consists of at least a part of elements from the bonding layer and at least a part of elements from the conductive pad. A plurality of voids are present between the bonding layer and the conductive pad, and one of the voids is bounded by the diffusive bonding portion and at least one of the conductive pad and the bonding layer.

A micro-bonding structure including a substrate, a conductive pad, a bonding layer, a micro device, and a diffusive bonding portion is provided. The conductive pad is present on the substrate. The bonding layer is present on the conductive pad. The micro device is present on the bonding layer. The diffusive bonding portion is present between and electrically connected with the bonding layer and the conductive pad. The diffusive bonding portion consists of at least a part of elements from the bonding layer and at least a part of elements from the conductive pad. A plurality of voids are present between the bonding layer and the conductive pad, and one of the voids is bounded by the diffusive bonding portion and at least one of the conductive pad and the bonding layer.

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

A semiconductor device includes a semiconductor substrate having a semiconductor device on an active surface thereof. The semiconductor substrate has a quadrangular plane. An insulating layer is on the active surface of the semiconductor substrate. A passivation layer is on the insulating layer. The insulating layer includes an insulating layer central portion having a side surface extending in parallel with a side surface of the semiconductor substrate. The side surface of the insulating layer central portion is spaced apart from the side surface of the semiconductor substrate by a first size. An insulating layer corner portion is at each corner of the insulating layer central portion and protrudes from the side surface of the insulating layer central portion in a horizontal direction. The passivation layer covers the insulating layer central portion.

A semiconductor device includes a semiconductor substrate having a semiconductor device on an active surface thereof. The semiconductor substrate has a quadrangular plane. An insulating layer is on the active surface of the semiconductor substrate. A passivation layer is on the insulating layer. The insulating layer includes an insulating layer central portion having a side surface extending in parallel with a side surface of the semiconductor substrate. The side surface of the insulating layer central portion is spaced apart from the side surface of the semiconductor substrate by a first size. An insulating layer corner portion is at each corner of the insulating layer central portion and protrudes from the side surface of the insulating layer central portion in a horizontal direction. The passivation layer covers the insulating layer central portion.