The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.

A foil-based package and a method for manufacturing a foil-based package includes, among other things, a first and a second foil substrate. An electronic component is arranged between the two foil substrates in a sandwich-like manner. Due to the component thickness, there is a distance difference between the two foil substrates between the mounting area of the component and ears outside of the mounting area. The foil-based package and the method provides means for reducing and/or compensating a distance difference between the first foil substrate and the second foil substrate caused by the component thickness.

A first package is bonded to a first substrate with first external connections and second external connections. The second external connections are formed using materials that are different than the first external connections in order to provide a thermal pathway from the first package. In a particular embodiment the first external connections are solder balls and the second external connections are copper blocks.

Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations. In one embodiment, an integrated circuit (IC) assembly includes a package substrate having a first side and a second side disposed opposite to the first side, a first die having an active side coupled with the first side of the package substrate and an inactive side disposed opposite to the active side, the first die having one or more through-silicon vias (TSVs) configured to route electrical signals between the first die and a second die, and a mold compound disposed on the first side of the package substrate, wherein the mold compound is in direct contact with a sidewall of the first die between the active side and the inactive side and wherein a distance between the first side and a terminating edge of the mold compound that is farthest from the first side is equal to or less than a distance between the inactive side of the first die and the first side. Other embodiments may be described and/or claimed.

A fingerprint recognition module according to an embodiment includes a substrate; a conductive pattern portion disposed on the substrate; a protective layer partially disposed on the substrate and the conductive pattern portion; a first connection portion disposed on a conductive pattern portion exposed through a first open region of the protective layer; and a first chip disposed on the first connection portion; wherein the first connection portion includes an anisotropic conductive adhesive disposed on the conductive pattern portion exposed through the first open region and having a closed loop shape and including conductive particles.

This method for producing a structure wherein base materials are bonded by atomic diffusion comprises: a step for applying a liquid resin on the base material; a step for smoothing the surface of the liquid resin by surface tension; a step for forming a resin layer by curing; a step for forming a metal thin film on the resin layer; a step for forming a metal thin film on the base material; and a step for bringing the metal thin film of the base material and the metal thin film of the base material into close contact with each other, thereby bonding the metal thin film of the resin layer and the metal thin film of the base material with each other by atomic diffusion.

A semiconductor structure is provided, and includes a substrate and a plurality of devices disposed over the substrate. The semiconductor structure includes an interconnect structure disposed over the substrate and electronically connected to the devices. The semiconductor structure also includes a bonding film formed over the interconnect structure. The semiconductor structure further includes a protective layer formed on sidewalls of the substrate, the interconnect structure and the bonding film. In addition, the semiconductor structure includes a dielectric material formed on a sidewall of the protective layer and overlapping with the protective layer in a top view.

A die bonding method includes obtaining information about a quality grade of each die of a plurality of dies placed at a wafer, picking up a first die among the plurality of dies from the wafer, identifying a bonding location of a plurality of bonding locations from a substrate according to a quality grade of the first die, and bonding the first die to the bonding location of the substrate.

A pick and place method and apparatus thereof are provided. The pick and place method includes: providing at least one semiconductor element disposed on a source storage location; picking up the at least one semiconductor element from the source storage location; transferring the at least one semiconductor element to a temporary storage device according to a signal; positioning the at least one semiconductor element through the temporary storage device; and picking up the positioned semiconductor element from the temporary storage device and placing the positioned semiconductor element on a destination storage location.

A device includes a redistribution layer (RDL) substrate. The device also includes a passive component in the RDL substrate proximate a first surface of the RDL substrate. The device further includes a first die coupled to a second surface of the RDL substrate, opposite the first surface of the RDL substrate.