Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/10
Bump connectors; Manufacturing methods related thereto
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H01L2224/12
Structure, shape, material or disposition of the bump connectors prior to the connecting process
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H01L2224/13
of an individual bump connector
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H01L2224/13001
Core members of the bump connector
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H01L2224/13198
with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
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H01L2224/13299

SEMICONDUCTOR STRUCTURE HAVING BUMP ON TILTING UPPER CORNER SURFACE
20180337116 · 2018-11-22 ·

A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate and a first conductive bump. The semiconductor substrate has an integrated circuit and an interconnection metal layer, and a tilt surface is formed on an edge of the semiconductor substrate. The first conductive bump is electrically connected to the integrated circuit via the interconnection metal layer, and is disposed on the tilt surface, wherein a profile of the first conductive bump extends beyond a side surface of the edge of the semiconductor layer.

SEMICONDUCTOR STRUCTURE HAVING BUMP ON TILTING UPPER CORNER SURFACE
20180337116 · 2018-11-22 ·

A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate and a first conductive bump. The semiconductor substrate has an integrated circuit and an interconnection metal layer, and a tilt surface is formed on an edge of the semiconductor substrate. The first conductive bump is electrically connected to the integrated circuit via the interconnection metal layer, and is disposed on the tilt surface, wherein a profile of the first conductive bump extends beyond a side surface of the edge of the semiconductor layer.