H01L2224/13624

Polymer layer on metal core for plurality of bumps connected to conductive pads

A semiconductor chip, a display device or an electronic device includes a substrate, one or more conductive pads disposed on the substrate, and one or more bumps electrically connected to the one or more conductive pads, in which the one or more bumps includes a metal core, a polymer layer disposed over a surface of the metal core, and a conductive coating layer disposed over a surface of the polymer layer and electrically connected to the one or more conductive pads.

Integrated circuit for a stable electrical connection and manufacturing method thereof

An integrated circuit includes a substrate, a pad electrode disposed on the substrate, and a passivation layer disposed on the pad electrode and including an organic insulating material. The integrated circuit further includes a bump electrode disposed on the passivation layer and connected to the pad electrode through a contact hole. The passivation layer includes an insulating portion having a first thickness and covering an adjacent edge region of the pad electrode and the substrate, and a bump portion having a second thickness, that is greater than the first thickness, and covering a center portion of the pad electrode.

Integrated circuit for a stable electrical connection and manufacturing method thereof

An integrated circuit includes a substrate, a pad electrode disposed on the substrate, and a passivation layer disposed on the pad electrode and including an organic insulating material. The integrated circuit further includes a bump electrode disposed on the passivation layer and connected to the pad electrode through a contact hole. The passivation layer includes an insulating portion having a first thickness and covering an adjacent edge region of the pad electrode and the substrate, and a bump portion having a second thickness, that is greater than the first thickness, and covering a center portion of the pad electrode.

SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS
20180182733 · 2018-06-28 ·

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.

Microelectronic element with bond elements to encapsulation surface

A microelectronic structure includes a semiconductor having conductive elements at a first surface. Wire bonds have bases joined to the conductive elements and free ends remote from the bases, the free ends being remote from the substrate and the bases and including end surfaces. The wire bonds define edge surfaces between the bases and end surfaces thereof. A compliant material layer extends along the edge surfaces within first portions of the wire bonds at least adjacent the bases thereof and fills spaces between the first portions of the wire bonds such that the first portions of the wire bonds are separated from one another by the compliant material layer. Second portions of the wire bonds are defined by the end surfaces and portions of the edge surfaces adjacent the end surfaces that are extend from a third surface of the compliant later.

Microelectronic element with bond elements to encapsulation surface

A microelectronic structure includes a semiconductor having conductive elements at a first surface. Wire bonds have bases joined to the conductive elements and free ends remote from the bases, the free ends being remote from the substrate and the bases and including end surfaces. The wire bonds define edge surfaces between the bases and end surfaces thereof. A compliant material layer extends along the edge surfaces within first portions of the wire bonds at least adjacent the bases thereof and fills spaces between the first portions of the wire bonds such that the first portions of the wire bonds are separated from one another by the compliant material layer. Second portions of the wire bonds are defined by the end surfaces and portions of the edge surfaces adjacent the end surfaces that are extend from a third surface of the compliant later.

Method of producing a hybridized device including microelectronic components

A method of producing a hybridized device including two microelectronic components, including a first microelectronic component having conductive inserts on a connection surface, and a second microelectronic component having ductile conductive pads on a surface opposed to the connection surface, is provided. The method includes the steps of hybridizing the first and second electronic components face-to-face by arranging the connection surface of the first microelectronic component to oppose the surface of the second microelectronic component having the ductile conductive pads, and establishing an electro-mechanical connection between the first microelectronic component and the second microelectronic component by inserting, at ambient temperature, inserts of the first microelectronic component, provided with a second metal sub-layer, into the ductile conductive pads of the second microelectronic component.

Method of producing a hybridized device including microelectronic components

A method of producing a hybridized device including two microelectronic components, including a first microelectronic component having conductive inserts on a connection surface, and a second microelectronic component having ductile conductive pads on a surface opposed to the connection surface, is provided. The method includes the steps of hybridizing the first and second electronic components face-to-face by arranging the connection surface of the first microelectronic component to oppose the surface of the second microelectronic component having the ductile conductive pads, and establishing an electro-mechanical connection between the first microelectronic component and the second microelectronic component by inserting, at ambient temperature, inserts of the first microelectronic component, provided with a second metal sub-layer, into the ductile conductive pads of the second microelectronic component.

Bonding structure for semiconductor package and method of manufacturing the same

A method of manufacturing a bonding structure includes (a) providing a substrate, wherein the substrate includes a top surface and at least one bonding pad disposed adjacent to the top surface of the substrate, at least one bonding pad having a sloped surface with a first slope; (b) providing a semiconductor element, wherein the semiconductor element includes at least one pillar, and at least one pillar has a sidewall with a second slope, wherein the absolute value of the first slope is smaller than the absolute value of the second slope; and (c) bonding at least one pillar to a portion of the sloped surface of corresponding ones of the at least one bonding pad.

Bonding structure for semiconductor package and method of manufacturing the same

A method of manufacturing a bonding structure includes (a) providing a substrate, wherein the substrate includes a top surface and at least one bonding pad disposed adjacent to the top surface of the substrate, at least one bonding pad having a sloped surface with a first slope; (b) providing a semiconductor element, wherein the semiconductor element includes at least one pillar, and at least one pillar has a sidewall with a second slope, wherein the absolute value of the first slope is smaller than the absolute value of the second slope; and (c) bonding at least one pillar to a portion of the sloped surface of corresponding ones of the at least one bonding pad.