A light emitting device package can include first and second frames spaced apart from each other; a package body including a body portion between the first and second frames; a light emitting device including first and second electrode pads; first and second through holes in the first and second frames, respectively; a first resin between the body portion and the light emitting device; and a conductive material in the first and second through holes, in which the first and second electrode pads of the light emitting device respectively overlap with the first and second through holes, the first and second electrode pads are spaced apart from each other, and the conductive material in the first and second through holes respectively contacts the first and second electrode pads, and a first side surface of the first electrode pad and a second side surface of the second electrode pad facing the first side surface both contact the first resin.

According to principles as taught herein, a leadframe array for a semiconductor die is prepared having locations to receive solder balls. Solder balls are then applied to the leadframe array, after which the leadframe array and solder ball combination is placed in a first mold and encased in a first molding compound. After the molding compound is cured, a layer of molding compound is removed to expose the solder balls. After this, a semiconductor die is electrically connected to the exposed solder balls. The combined semiconductor die and leadframe are placed in a second mold, and a second molding compound injected. The second molding compound flows around the semiconductor die and leadframe combination, fully enclosing the electrical connections between the leadframe and the semiconductor die, making the final package a twice-molded configuration. After this, the twice-molded semiconductor package array is cut at the appropriate locations to singulate the packages into individual products.

According to principles as taught herein, a leadframe array for a semiconductor die is prepared having locations to receive solder balls. Solder balls are then applied to the leadframe array, after which the leadframe array and solder ball combination is placed in a first mold and encased in a first molding compound. After the molding compound is cured, a layer of molding compound is removed to expose the solder balls. After this, a semiconductor die is electrically connected to the exposed solder balls. The combined semiconductor die and leadframe are placed in a second mold, and a second molding compound injected. The second molding compound flows around the semiconductor die and leadframe combination, fully enclosing the electrical connections between the leadframe and the semiconductor die, making the final package a twice-molded configuration. After this, the twice-molded semiconductor package array is cut at the appropriate locations to singulate the packages into individual products.

A process for manufacturing a semiconductor flip chip package and a corresponding flip chip package. The process comprises associating conducting bump pads to a face corresponding to an active side of one or more electronic dice, flipping the one or more electronic dice so that said face corresponding to an active side of one or more electronic dies is facing a leadframe carrying contacting pads in correspondence of said conducting bump pads, bonding said contacting pads to said conducting bump pads and encasing said one or more electronic dice in a casing by a molding operation. The process includes providing a leadframe having contacting pads presenting a recessed surface in correspondence of the position of said conducting bump pads.

A method may include providing a chip carrier having a chip supporting region to support a chip, and a chip contacting region having at least one contact pad, the chip carrier being thinner in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region. A disposing of the chip, having at least one contact protrusion, over the chip carrier, such that the at least one contact protrusion is arranged over the at least one contact pad may be included. In addition, a pressing of the chip against the chip carrier such that the at least one contact protrusion extends at least partially into the chip contacting region and is electrically contacted to the at least one contact pad may be included.

A light-emitting device package includes a lead frame, a light-emitting device chip, a molding structure, and a plurality of slots. The lead frame includes a first lead and a second lead including metal and spaced apart from each other. The light-emitting device chip is mounted on a first area of the lead frame, which includes a part of the first lead and a part of the second lead. The molding structure includes an outer barrier surrounding an outside of the lead frame and an inner barrier. The plurality of slots are formed in each of the first lead and the second lead. The inner barrier divides the lead from into the first area and a second area. The inner barrier fills between the first lead in the second lead. The second area is located outside of the first area. The plurality of slots are filled by the molding structure.

A semiconductor package includes a leadframe, a semiconductor die attached to the leadframe, and a passive component electrically connected to the semiconductor die through the leadframe. The leadframe includes a cavity in a side of the leadframe opposite the semiconductor die, and at least a portion of the passive component resides within the cavity in a stacked arrangement.

A semiconductor device includes a wiring substrate, a semiconductor element mounted on the wiring substrate, a heat dissipating plate arranged above the semiconductor element, and an encapsulation resin that encapsulates the semiconductor element and fills a space between the wiring substrate and the heat dissipating plate and a space between the semiconductor element and the heat dissipating plate. The heat dissipating plate includes a main body arranged overlapping the semiconductor element in plan view, and a lead projecting outward from the main body. The lead is thinner than the main body. The lead includes an upper surface covered by the encapsulation resin, and an outer side surface located at an outer edge of the semiconductor device and exposed from an outer side surface of the encapsulation resin. The main body includes an upper surface exposed from an outer surface of the encapsulation resin.

A method may include providing a chip carrier having a chip supporting region to support a chip, and a chip contacting region having at least one contact pad, the chip carrier being thinner in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region. A disposing of the chip, having at least one contact protrusion, over the chip carrier, such that the at least one contact protrusion is arranged over the at least one contact pad may be included. In addition, a pressing of the chip against the chip carrier such that the at least one contact protrusion extends at least partially into the chip contacting region and is electrically contacted to the at least one contact pad may be included.

A semiconductor device and a method for making it are disclosed. The semiconductor device includes a first substrate having a front side and a backside opposite thereto, wherein a device structure is formed at the front side of the first substrate, and a DTC is formed at the backside of the first substrate; a first insulating layer and a second insulating layer, which are formed on the front side and the backside of the first substrate, respectively; a first interconnect structure and a second interconnect structure, the first interconnect structure formed in the first insulating layer, the second interconnect structure formed in the second insulating layer; and a plug structure formed in the first insulating layer, one end of the plug structure electrically connected to the device structure through the first interconnect structure, the other end of the plug structure electrically connected to the DTC through the second interconnect structure.