Patent classifications
H01L2224/29655
Fabrication method for package structure
In a fabrication method for a package structure, a copper foil is provided, electroplating is performed on the copper foil to form a cavity sacrificial post, a dielectric material is laminated to form a dielectric layer, wherein an end face of the cavity sacrificial post is exposed to the dielectric layer, a wiring layer is formed on the dielectric layer, the cavity sacrificial post is removed by etching to form a through cavity, a bonding pad is formed on the wiring layer, a reverse side of a device is mounted on the copper foil in the through cavity, and a terminal of the device is wire-bonded with the bonding pad.
SEMICONDUCTOR PACKAGES WITH AN INTERMETALLIC LAYER
A method of forming a semiconductor package. Implementations include forming on a die backside an intermediate metal layer having multiple sublayers, each including a metal selected from the group consisting of titanium, nickel, copper, silver, and combinations thereof. A tin layer is deposited onto the intermediate metal layer and is then reflowed with a silver layer of a substrate to form an intermetallic layer having a melting temperature above 260 degrees Celsius and including an intermetallic consisting of silver and tin and/or an intermetallic consisting of copper and tin. Another method of forming a semiconductor package includes forming a bump on each of a plurality of exposed pads of a top side of a die, each exposed pad surrounded by a passivation layer, each bump including an intermediate metal layer as described above and a tin layer coupled to the intermediate metal layer is reflowed to form an intermetallic layer.
SEMICONDUCTOR PACKAGES WITH AN INTERMETALLIC LAYER
A method of forming a semiconductor package. Implementations include forming on a die backside an intermediate metal layer having multiple sublayers, each including a metal selected from the group consisting of titanium, nickel, copper, silver, and combinations thereof. A tin layer is deposited onto the intermediate metal layer and is then reflowed with a silver layer of a substrate to form an intermetallic layer having a melting temperature above 260 degrees Celsius and including an intermetallic consisting of silver and tin and/or an intermetallic consisting of copper and tin. Another method of forming a semiconductor package includes forming a bump on each of a plurality of exposed pads of a top side of a die, each exposed pad surrounded by a passivation layer, each bump including an intermediate metal layer as described above and a tin layer coupled to the intermediate metal layer is reflowed to form an intermetallic layer.
Anisotropic conductive film with carbon-based conductive regions having void space and related semiconductor device assemblies and methods
An anisotropic conductive film (ACF) is formed with an ordered array of discrete regions that include a conductive carbon-based material. The discrete regions, which may be formed at small pitch, are embedded in at least one adhesive dielectric material. The ACF may be used to mechanically and electrically interconnect conductive elements of initially-separate semiconductor dice in semiconductor device assemblies. Methods of forming the ACF include forming a precursor structure with the conductive carbon-based material and then joining the precursor structure to a separately-formed structure that includes adhesive dielectric material to be included in the ACF. Sacrificial materials of the precursor structure may be removed and additional adhesive dielectric material formed to embed the discrete regions with the conductive carbon-based material in the adhesive dielectric material of the ACF.
Anisotropic conductive film with carbon-based conductive regions having void space and related semiconductor device assemblies and methods
An anisotropic conductive film (ACF) is formed with an ordered array of discrete regions that include a conductive carbon-based material. The discrete regions, which may be formed at small pitch, are embedded in at least one adhesive dielectric material. The ACF may be used to mechanically and electrically interconnect conductive elements of initially-separate semiconductor dice in semiconductor device assemblies. Methods of forming the ACF include forming a precursor structure with the conductive carbon-based material and then joining the precursor structure to a separately-formed structure that includes adhesive dielectric material to be included in the ACF. Sacrificial materials of the precursor structure may be removed and additional adhesive dielectric material formed to embed the discrete regions with the conductive carbon-based material in the adhesive dielectric material of the ACF.
JOINING STRUCTURE AND JOINING MATERIAL FOR FORMING JOINING PART OF SAID JOINING STRUCTURE
A joining structure including a joining part that joins two objects, in which the joining part includes a first metal phase containing Bi as a main component, the first metal phase having a granular shape with an average size of 0.5 m to 5 m, and a second metal phase containing Cu as a main component and containing Sn and In, the first metal phase is dispersed in the second metal phase, and the joining part has a metal composition ratio of Sn: 9.4 mass % to 19.4 mass %, Bi: 26.7 mass % to 36.7 mass %, In: 6.5 mass % to 16.5 mass %, and Cu: a balance.
Heat radiation structure and electronic apparatus
A heat radiation structure includes a vapor chamber provided along a surface of a die, a mesh interposed between the die and the vapor chamber, and a liquid metal impregnated in the mesh. In the mesh, a peripheral portion has a higher material density per unit volume than a central portion. In the mesh, the central portion may be formed of a single layer, and the peripheral portion is formed of two layers. The mesh may be a resin material.
Semiconductor device
A semiconductor device encompasses a mounting member having a copper-based wiring layer; first covering layer which contains nickel, covering the wiring layer so that a part of upper surface of the wiring layer is exposed in opening; joint layer metallurgically joined to the wiring layer in the opening; second covering layer which contains nickel, metallurgically joined to the joint layer on upper surface of the joint layer; semiconductor chip having bottom surface covered with the second covering layer. The joint layer has lower layer in contact with the wiring layer, upper layer in contact with the second covering layer, and intermediate layer between the lower layer and the upper layer, the lower layer and the upper layer have intermetallic compounds as main components which contain tin, copper and nickel, and the intermediate layer is alloy containing tin as the main component and no lead.
PACKAGE STRUCTURE AND PACKAGING METHOD
A package structure includes a substrate, a chip disposed on the substrate and having a backside surface away from the substrate, a heat sink disposed above the substrate and having a surface facing the back side surface, and a thermal interface material disposed between the chip and the heat sink. There is no organic adhesive between the chip and the heat sink. A method for forming the package structure is also provided.