Patent classifications
H01L2224/45164
Chip arrangements
A chip arrangement including a chip comprising a chip back side; a back side metallization on the chip back side, the back side metallization including a plurality of layers; a substrate comprising a surface with a metal layer; a zinc-based solder alloy configured to attach the back side metallization to the metal layer, the zinc-based solder alloy having by weight 8% to 20% aluminum, 0.5% to 20% magnesium, 0.5% to 20% gallium, and the balance zinc; wherein the metal layer is configured to provide a good wettability of the zinc-based solder alloy on the surface of the substrate. The plurality of layers may include one or more of a contact layer configured to contact a semiconductor material of the chip back side; a barrier layer; a solder reaction, and an oxidation protection layer configured to prevent oxidation of the solder reaction layer.
Coated wire
A wire comprising a wire core with a surface, the wire core having a coating layer superimposed on its surface, wherein the wire core includes: (a) pure silver consisting of silver and further components; or (b) doped silver consisting of silver, at least one doping element, and further components; or (c) a silver alloy consisting of silver, palladium and further components; or (d) a silver alloy consisting of silver, palladium, gold, and further components; or (e) a doped silver alloy consisting of silver, palladium, gold, at least one doping element, and further components, wherein the individual amount of any further component is less than 30 wt.-ppm and the individual amount of any doping element is at least 30 wt.-ppm, and the coating layer is a single-layer of gold or palladium or a double-layer comprised of an inner layer of nickel or palladium and an adjacent outer layer of gold.
Bonding wire for semiconductor device
The present invention provides a bonding wire for a semiconductor device suitable for cutting-edge high-density LSIs and on-vehicle LSIs by improving the formation rate of CuAl IMC in ball bonds. A bonding wire for a semiconductor device contains Pt of 0.1 mass % to 1.3 mass %, at least one dopant selected from a first dopant group consisting of In, Ga, and Ge, for a total of 0.05 mass % to 1.25 mass %, and a balance being made up of Cu and incidental impurities.
Cu ALLOY BONDING WIRE FOR SEMICONDUCTOR DEVICE
It is an object to provide a Cu alloy bonding wire for a semiconductor device that can satisfy required performance in high-density LSI applications. In the Cu alloy bonding wire for a semiconductor device according to the present invention, each of abundance ratios of crystal orientations <100>, <110> and <111> having an angular difference of 15 degrees or less from a direction perpendicular to one plane including a wire center axis out of crystal orientations on a wire surface is 3% or more and less than 27% in average area percentage.
SEMICONDUCTOR DEVICE AND WIRE BONDING METHOD
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, and a wire extending between the first electrode and the second electrode. The wire includes a first conductor in contact with the first electrode and the second electrode, and a second conductor that is provided inside the first conductor and has no contact with the first electrode and the second electrode.
Semiconductor device
According to one embodiment, a semiconductor device includes a wiring board, a controller chip that is provided on the wiring board and is sealed with a first resin composition, a nonvolatile memory chip that is provided on the first resin composition and is sealed with a second resin composition, a second bonding wire that connects a pad for electric power supply wiring of the controller chip to the wiring board and is sealed with the first resin composition, and a first bonding wire that connects a pad for signal wiring of the controller chip to the wiring board, is sealed with the first resin composition, and has a higher Pd content than that of the second bonding wire.
Semiconductor device
According to one embodiment, a semiconductor device includes a wiring board, a controller chip that is provided on the wiring board and is sealed with a first resin composition, a nonvolatile memory chip that is provided on the first resin composition and is sealed with a second resin composition, a second bonding wire that connects a pad for electric power supply wiring of the controller chip to the wiring board and is sealed with the first resin composition, and a first bonding wire that connects a pad for signal wiring of the controller chip to the wiring board, is sealed with the first resin composition, and has a higher Pd content than that of the second bonding wire.
NOBLE METAL-COATED SILVER WIRE FOR BALL BONDING AND METHOD FOR PRODUCING THE SAME, AND SEMICONDUCTOR DEVICE USING NOBLE METAL-COATED SILVER WIRE FOR BALL BONDING AND METHOD FOR PRODUCING THE SAME
A noble metal-coated silver bonding wire suppresses corrosion at the bonding interface even under severe conditions of high temperature and high humidity in automobiles and does not cause energization failure in a semiconductor device in which electrodes of a semiconductor chip and electrodes of lead frames or the like are connected by the bonding wire. The noble metal-coated silver wire for ball bonding wire includes a noble metal coating layer on a core material made of pure silver or a silver alloy, wherein the wire contains at least one sulfur group element, the noble metal coating layer includes at least one palladium layer, the total palladium content relative to the entire wire is 0.01 mass % or more and 5.0 mass % or less, and the total sulfur group element content relative to the entire wire is 0.1 mass ppm or more and 100 mass ppm or less.
NOBLE METAL-COATED SILVER WIRE FOR BALL BONDING AND METHOD FOR PRODUCING THE SAME, AND SEMICONDUCTOR DEVICE USING NOBLE METAL-COATED SILVER WIRE FOR BALL BONDING AND METHOD FOR PRODUCING THE SAME
A noble metal-coated silver bonding wire suppresses corrosion at the bonding interface even under severe conditions of high temperature and high humidity in automobiles and does not cause energization failure in a semiconductor device in which electrodes of a semiconductor chip and electrodes of lead frames or the like are connected by the bonding wire. The noble metal-coated silver wire for ball bonding wire includes a noble metal coating layer on a core material made of pure silver or a silver alloy, wherein the wire contains at least one sulfur group element, the noble metal coating layer includes at least one palladium layer, the total palladium content relative to the entire wire is 0.01 mass % or more and 5.0 mass % or less, and the total sulfur group element content relative to the entire wire is 0.1 mass ppm or more and 100 mass ppm or less.
BONDING WIRE FOR SEMICONDUCTOR DEVICE
Provided is a Pd coated Cu bonding wire for a semiconductor device capable of sufficiently obtaining bonding reliability of a ball bonded portion in a high temperature environment of 175 C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases.
The bonding wire for a semiconductor device comprises a Cu alloy core material; and a Pd coating layer formed on a surface of the Cu alloy core material; and contains 0.03 to 2% by mass in total of one or more elements selected from Ni, Rh, Ir and Pd in the bonding wire and further 0.002 to 3% by mass in total of one or more elements selected from Li, Sb, Fe, Cr, Co, Zn, Ca, Mg, Pt, Sc and Y. The bonding wire can be sufficiently obtained bonding reliability of a ball bonded portion in a high temperature environment of 175 C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases by being used.