Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/42
Wire connectors; Manufacturing methods related thereto
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H01L2224/44
Structure, shape, material or disposition of the wire connectors prior to the connecting process
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H01L2224/45
of an individual wire connector
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H01L2224/456
with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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H01L2224/45617
the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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H01L2224/4562
Antimony (Sb) as principal constituent
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H01L2224/4562

BALL-BOND ARRANGEMENT
20250015037 · 2025-01-09 ·

A ball-bond arrangement comprising a bond pad of a semiconductor device and a wire ball-bonded to the bond pad, wherein the wire extending from the bonded ball has a diameter of 15 to 50 m, and comprises a silver-based wire core with a surface, the wire core having a coating layer superimposed on its surface, wherein the coating layer is a double-layer comprised of a 1 to 40 nm thick inner layer of palladium or nickel and an adjacent 20 to 500 nm thick outer layer of gold, and wherein the surface of the bonded ball has a gold coverage of 70 to 100%.