A micro-coaxial wire has an overall diameter in a range of 0.1 m-550 m, a conductive core of the wire has a cross-sectional diameter in a range of 0.05 m-304 m, an insulator is disposed on the conductive core with thickness in a range of 0.005 m-180 m, and a conductive shield layer is disposed on the insulator with thickness in a range of 0.009 m-99 m.

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are uncovered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are uncovered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

There is provided a novel Al wiring material that achieves both of a suppression of chip damage and a thermal shock resistance. In aspect 1, the Al wiring material includes an Al core material and an Al coating layer formed on a surface of the Al core material, and satisfies 1.2?H.sub.1h/H.sub.1s where H.sub.1h is a Vickers hardness of the Al core material (Hv) and H.sub.1s is a Vickers hardness of the Al coating layer (Hv). In aspect 2, the Al wiring material includes an Al core material and an Al coating layer formed on a surface of the Al core material, and satisfies 1.2?H.sub.2h/H.sub.2s where H.sub.2s is a Vickers hardness of the Al core material (Hv) and H.sub.2h is a Vickers hardness of the Al coating layer (Hv).

A semiconductor module includes a semiconductor element, a substrate, and a bond connector designed as a gate resistor, shunt, resistor in an RC filter or fuse. The bond connector includes a core made of a first metal material and a jacket which is designed to envelope the core and made from a second metal material that is different from the first metal material, with the first metal material having an electrical conductivity which is lower than an electrical conductivity of the second metal material. At least one of the semiconductor element and the substrate is connected to the bond connector.

A semiconductor module includes a semiconductor element, a substrate, and a bond connector designed as a gate resistor, shunt, resistor in an RC filter or fuse. The bond connector includes a core made of a first metal material and a jacket which is designed to envelope the core and made from a second metal material that is different from the first metal material, with the first metal material having an electrical conductivity which is lower than an electrical conductivity of the second metal material. At least one of the semiconductor element and the substrate is connected to the bond connector.

A semiconductor device is provided to reduce thermal fatigue in a junction portion of an external wiring to enhance long-term reliability, where the semiconductor device includes a semiconductor substrate, a transistor portion and a diode portion that are alternately arranged along a first direction parallel to a front surface of the semiconductor substrate inside the semiconductor substrate, a surface electrode that is provided above the transistor portion and the diode portion and that is electrically connected to the transistor portion and the diode portion, an external wiring that is joined to the surface electrode and that has a contact width with the surface electrode in the first direction, the contact width being larger than at least one of a width of the transistor portion in the first direction and a width of the diode portion in the first direction.

A semiconductor device is provided to reduce thermal fatigue in a junction portion of an external wiring to enhance long-term reliability, where the semiconductor device includes a semiconductor substrate, a transistor portion and a diode portion that are alternately arranged along a first direction parallel to a front surface of the semiconductor substrate inside the semiconductor substrate, a surface electrode that is provided above the transistor portion and the diode portion and that is electrically connected to the transistor portion and the diode portion, an external wiring that is joined to the surface electrode and that has a contact width with the surface electrode in the first direction, the contact width being larger than at least one of a width of the transistor portion in the first direction and a width of the diode portion in the first direction.

A light emitting apparatus includes a positive lead terminal and a negative lead terminal, each of which includes a first main surface, a second main surface, and an end surface including a first recessed surface area extending from a first point of the first main surface in cross section, and a second recessed surface area extending from a second point of the second main surface in cross section. A distance between a first part of the end surface of the positive lead terminal and a second part of the end surface of the negative lead terminal than a first distance between the first points of the positive lead terminal and the negative lead terminal and a second distance between the second points of the positive lead terminal and the negative lead terminal. The first part and the second part are separated from the first point and the second point.

A printed circuit board is disclosed. The printed circuit board includes: a substrate layer; a copper layer disposed on the substrate layer; and an organic solderability preservative (OSP) layer disposed on the copper layer. The OSP layer defines one or more laser treated OSP surfaces.