Patent classifications
H01L2224/45624
LASER ABLATION FOR WIRE BONDING ON ORGANIC SOLDERABILITY PRESERVATIVE SURFACE
A printed circuit board is disclosed. The printed circuit board includes: a substrate layer; a copper layer disposed on the substrate layer; and an organic solderability preservative (OSP) layer disposed on the copper layer. The OSP layer defines one or more laser treated OSP surfaces.
Semiconductor Device
A semiconductor device includes a semiconductor element having a front electrode, an electrode plate having an area larger than the front electrode of the semiconductor element in a two-dimensional view and made of aluminum or aluminum alloy, and a metal member having a joint surface joined to the front electrode of the semiconductor element with solder, having an area smaller than the front electrode of the semiconductor element in a two-dimensional view, made of a metal different from the electrode plate, and fastened to the electrode plate to electrically connect the front electrode of the semiconductor element to the electrode plate.
Semiconductor Device
A semiconductor device includes a semiconductor element having a front electrode, an electrode plate having an area larger than the front electrode of the semiconductor element in a two-dimensional view and made of aluminum or aluminum alloy, and a metal member having a joint surface joined to the front electrode of the semiconductor element with solder, having an area smaller than the front electrode of the semiconductor element in a two-dimensional view, made of a metal different from the electrode plate, and fastened to the electrode plate to electrically connect the front electrode of the semiconductor element to the electrode plate.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, semiconductor device includes a semiconductor layer, an electrode provided on the semiconductor layer, and a bonding wire connected to the electrode, wherein the electrode comprises a first metal layer containing copper, a second metal layer containing aluminum, provided between the first metal layer and the semiconductor layer, and a third metal layer provided between the first metal layer and the second metal layer, the third metal layer comprising a material different from those of the first metal layer and the second metal layer, and the thickness of the first metal layer is larger than the thickness of the second metal layer and larger than the thickness of the third metal layer.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, semiconductor device includes a semiconductor layer, an electrode provided on the semiconductor layer, and a bonding wire connected to the electrode, wherein the electrode comprises a first metal layer containing copper, a second metal layer containing aluminum, provided between the first metal layer and the semiconductor layer, and a third metal layer provided between the first metal layer and the second metal layer, the third metal layer comprising a material different from those of the first metal layer and the second metal layer, and the thickness of the first metal layer is larger than the thickness of the second metal layer and larger than the thickness of the third metal layer.
Surface finish for wirebonding
The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.
Surface finish for wirebonding
The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.
Semiconductor apparatus
A semiconductor apparatus includes: a case made of resin; an insert terminal including an external terminal portion embedded in the case and having a first terminal exposed from the case, and an internal terminal portion bent in a L shape with respect to a second terminal of the external terminal portion and having a first surface exposed from the case and an anchor part in close contact with the case; and a bonding wire bonded to the first surface of the internal terminal portion.
POWER MODULE
A power module includes a substrate, chips, supporting pillars, a metal plate and bonding bodies is disclosed. The substrate includes a metallic layer. The chips are on the metallic layer of the substrate, and each of the chips includes a source, a gate, and a drain. The supporting pillars are on the chips. The metal plate is on the supporting pillars and connected with the supporting pillars. The bonding bodies connect the metal plate and the metallic layer.
Molded package with chip carrier comprising brazed electrically conductive layers
A method of manufacturing a package, wherein the method comprises a forming a chip carrier by covering a thermally conductive and electrically insulating core on both opposing main surfaces thereof at least partially by a respective electrically conductive layer by brazing the respective electrically conductive layer on a respective one of the main surfaces; a mounting at least one electronic chip on the chip carrier; an electrically coupling an electrically conductive contact structure with the at least one electronic chip; and an encapsulating part of the electrically conductive contact structure, and at least part of the chip carrier and of the at least one electronic chip by a mold-type encapsulant.