H01L2224/48177

ELECTRONIC DEVICE AND ELECTRONIC DEVICE MOUNTING STRUCTURE
20220310491 · 2022-09-29 ·

An electronic device includes: an electronic element having an element obverse surface and an element reverse surface spaced apart from each other in a first direction, the element obverse surface being provided with an obverse-surface electrode; a resin member having a resin reverse surface facing in a same direction as the element reverse surface, the resin member covering the electronic element; and an electrically conductive member supporting the electronic element and electrically connected to the electronic element. The electrically conductive member has a first exposed region, a second exposed region and a third exposed region each of which is exposed from the resin reverse surface. The resin member has a first resin side surface and a second resin side surface connected to each other and standing up from the resin reverse surface. As viewed in the first direction, the first exposed region is located at a corner portion where the first resin side surface and the second resin side surface are connected. As viewed in the first direction, the second exposed region is located side by side with the first exposed region in a second direction extending along the first resin side surface. The third exposed region is located between the first exposed region and the second exposed region in the second direction. As viewed in the first direction, the third exposed region has a larger area than each of the first exposed region and the second exposed region.

INTEGRATED CIRCUIT LEAD FRAME AND SEMICONDUCTOR DEVICE THEREOF
20220238419 · 2022-07-28 · ·

An integrated circuit lead frame and a semiconductor device thereof are provided. The integrated circuit lead frame includes a die pad and a plurality of leads. The die pad is provided to attach a die. The plurality of leads are provided for connection to the die through wire bonding. The leads include a pair of a first lead and a second lead. The first lead includes a first body and a first extension portion connected to the first body. The second lead includes a second body and a second extension portion connected to the second body. The first extension portion and the second extension portion extend in directions toward each other.

Current sensor package with continuous insulation

A current sensor package, comprises a current path and a sensing device. The sensing device is spaced from the current path, and the sensing device is configured for sensing a magnetic field generated by a current flowing through the current path. Further, the sensing device comprises a sensor element. The sensing device is electrically connected to a conductive trace. An encapsulant extends continuously between the current path and the sensing device.

METHODS FOR PILLAR CONNECTION ON FRONTSIDE AND PASSIVE DEVICE INTEGRATION ON BACKSIDE OF DIE
20210375856 · 2021-12-02 ·

An integrated circuit device includes a radio frequency transistor amplifier die having a first surface, a second surface, a semiconductor layer structure that is between the first and second surfaces and includes a plurality of transistor cells adjacent the first surface, and terminals coupled to the transistor cells. At least one passive electronic component is provided on the second surface of the die and is electrically connected to at least one of the terminals, for example, by at least one conductive via. One or more conductive pillar structures may protrude from the first surface of the die to provide electrical connections to one or more of the terminals.

METHODS FOR PILLAR CONNECTION ON FRONTSIDE AND PASSIVE DEVICE INTEGRATION ON BACKSIDE OF DIE
20220208758 · 2022-06-30 ·

An integrated circuit device includes a radio frequency transistor amplifier die having a first surface, a second surface, a semiconductor layer structure that is between the first and second surfaces and includes a plurality of transistor cells adjacent the first surface, and terminals coupled to the transistor cells. At least one passive electronic component is provided on the second surface of the die and is electrically connected to at least one of the terminals, for example, by at least one conductive via. One or more conductive pillar structures may protrude from the first surface of the die to provide electrical connections to one or more of the terminals.

QFN/QFP PACKAGE WITH INSULATED TOP-SIDE THERMAL PAD

A packaged electronic device comprises a die attach pad enclosed by a package structure, a semiconductor die mounted to a side of the die attach pad, a conductive plate and a polymer layer having a first side on a side of the conductive plate and a second side on the die attach pad. A method of manufacturing a packaged electronic device comprises attaching a first side of a polymer layer to a first side of a conductive plate, attaching a first side of a die attach pad to a second side of the polymer layer and attaching a first side of a semiconductor die to a second side of the die attach pad.

SEMICONDUCTOR PACKAGES WITH VERTICAL PASSIVE COMPONENTS

An embodiment related to a package is disclosed. The package includes a component mounted to a die attach region on a package substrate. A passive component with first and second passive component terminals is vertically attached to the package substrate. An encapsulant is disposed over the package substrate to encapsulate the package. In one embodiment, an external component is stacked above the encapsulant and is electrically coupled to the encapsulated package.

PACKAGE WITH LOAD TERMINALS ON WHICH COUPLED POWER COMPONENT AND LOGIC COMPONENT ARE MOUNTED
20220173023 · 2022-06-02 · ·

A package is disclosed. In one example, the package comprises a first load terminal, a second load terminal, a power component mounted on the first load terminal, and a logic component electrically conductively mounted on one of the first load terminal. The logic component is the second load terminal and electrically connected with the power component for controlling the power component.

Semiconductor package having a semiconductor die on a plated conductive layer
11348863 · 2022-05-31 · ·

In various embodiments, the present disclosure provides semiconductor packages, devices, and methods. In one embodiment, a device includes a die pad, leads that are spaced apart from the die pad, and a semiconductor die on the die pad. The semiconductor die has a first surface and a second surface opposite the first surface. The second surface faces the die pad. An encapsulant is provided on the semiconductor die, the die pad and the leads, and the encapsulant has a first surface opposite the die pad and the leads, and a second surface opposite the first surface. The second surface of the encapsulant extends between the die pad and an adjacent lead. The second surface of the encapsulant is spaced apart from the first surface of the encapsulant by a first distance, and an exposed surface of the die pad is spaced apart from the first surface of the encapsulant by a second distance that is greater than the first distance.

SIGNAL ISOLATOR HAVING ENHANCED CREEPAGE CHARACTERISTICS

Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.