H01L21/31116

ETCHING METHOD AND PLASMA PROCESSING APPARATUS

An etching method includes: preparing a substrate including a first region containing silicon and nitrogen, and a second region containing silicon and oxygen; and etching the second region while firming a tungsten-containing protective layer on the first region, by exposing the first and second regions to plasma generated from a processing gas containing carbon, fluorine, and tungsten.

Method for producing resist pattern coating composition with use of solvent replacement method

Method for producing coating composition applied to patterned resist film in lithography process for solvent development to reverse pattern. The method including: step obtaining hydrolysis condensation product by hydrolyzing and condensing hydrolyzable silane in non-alcoholic hydrophilic solvent; step of solvent replacement wherein non-alcoholic hydrophilic solvent replaced with hydrophobic solvent for hydrolysis condensation product. Method for producing semiconductor device, including: step of applying resist composition to substrate and forming resist film; step of exposing and developing formed resist film; step applying composition obtained by above production method to patterned resist film obtained during or after development in step, forming coating film between patterns; step of removing patterned resist film by etching and reversing patterns. Production method that exposure is performed using ArF laser (with wavelength of 193 nm) or EUV (with wavelength of 13.5 nm). Production method that development is negative development with organic solvent.

Plasma processing apparatus and plasma processing method

In order to implement a plasma etching method for improving a tapered shape, a plasma processing apparatus includes: a processing chamber in which a sample is subjected to plasma processing; a first radio frequency power source that supplies radio frequency power for generating a plasma; a sample stage on which the sample is placed; a second radio frequency power source that supplies radio frequency power to the sample stage; and a control unit that controls the first radio frequency power source and the second radio frequency power source so as to etch a stacked film formed by alternately stacking a silicon oxide film and a polycrystalline silicon, or a stacked film formed by alternately stacking a silicon oxide film and a silicon nitride film, by using a plasma generated by a mixed gas of a hydrogen bromide gas, a hydrofluorocarbon gas and a nitrogen element-containing gas.

Method for forming semiconductor structure

A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.

Methods of forming contact features in semiconductor devices

A semiconductor structure includes an isolation feature disposed over a semiconductor substrate, a semiconductor fin disposed over the semiconductor substrate and adjacent to the isolation feature, a source/drain (S/D) feature disposed over the semiconductor substrate and apart from the isolation feature, an interlayer dielectric (ILD) layer disposed over the isolation feature and the S/D feature, a first contact plug disposed in the ILD layer and over the isolation feature, a second contact plug disposed in the ILD layer and over the S/D feature, and a dielectric layer between surfaces of the first contact plug and the ILD layer and between a sidewall of the second contact plug and the ILD layer, where a bottom surface of the second contact plug is free of the dielectric layer.

Source/drain contacts and methods of forming same

A device includes a device layer comprising a first transistor and a second transistor; a first interconnect structure on a front-side of the device layer; and a second interconnect structure on a backside of the device layer. The second interconnect structure comprising a first dielectric layer on the backside of the device layer, wherein a semiconductor material is disposed between the first dielectric layer and a first source/drain region of the first transistor; a contact extending through the first dielectric layer to a second source/drain region of the second transistor; and a first conductive line electrically connected to the second source/drain region of the second transistor through the contact.

Interconnect structures for semiconductor devices and methods of manufacturing the same

A method for making a semiconductor device includes forming a first patterned structure over an interlayer dielectric. The interlayer dielectric overlays a first source/drain structure and a second source/drain structure. The first patterned structure extends along a first lateral direction and a vertical projection of the first patterned structure is located between the first and second source/drain structures along a second lateral direction perpendicular to the first lateral direction. The method includes reducing a width of the first patterned structure that extends along the second lateral direction. The method includes forming, based on the first patterned structure having the reduced width, contact holes that expose the first source/drain structure and the second source/drain structure, respectively.

METHODS FOR ETCHING A MATERIAL LAYER FOR SEMICONDUCTOR APPLICATIONS

An apparatus and method for etching a material layer with a cyclic etching and deposition process. The method for etching a material layer on a substrate includes: (a) etching at least a portion of a material layer (302) on a substrate (101) in an etch chamber (100) to form an open feature (360) having a bottom surface (312) and sidewalls in the material layer (302); (b) forming a protection layer (314) on the sidewalls and the bottom surface (312) of the open feature (360) from a protection layer (314) gas mixture comprising at least one carbon-fluorine containing gas; (c) selectively removing the protection layer (314) formed on the bottom surface (312) of the open feature (360) from a bottom surface (312) open gas mixture comprising the carbon-fluorine containing gas; and (d) continuingly etching the material layer (302) from the bottom surface (312) of the open feature (360) until a desired depth of the open feature (360) is reached.

METHOD AND APPARATUS TO REDUCE FEATURE CHARGING IN PLASMA PROCESSING CHAMBER

Embodiments provided herein include an apparatus and methods for the plasma processing of a substrate in a processing chamber. In some embodiments, aspects of the apparatus and methods are directed to reducing defectivity in features formed on the surface of the substrate, improving plasma etch rate, and increasing selectivity of etching material to mask and/or etching material to stop layer. In some embodiments, the apparatus and methods enable processes that can be used to prevent or reduce the effect of trapped charges, disposed within features formed on a substrate, on the etch rate and defect formation. In some embodiments, the plasma processing methods include the synchronization of the delivery of pulsed-voltage (PV) waveforms, and alternately the delivery of a PV waveform and a radio frequency (RF) waveform, so as to allow for the independent control of generation of electrons that are provided, during one or more stages of a PV waveform cycle, to neutralize the trapped charges formed in the features formed on the substrate.

SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20220399222 · 2022-12-15 · ·

A semiconductor device manufacturing apparatus according to an embodiment includes: a chamber; a holder provided in the chamber and capable of adsorbing a substrate, the holder including a recess on a surface, a first hole provided in the recess, and a second hole provided in the recess; a first gas passage connected to the first hole; a second gas passage connected to the second hole; a first valve provided in the first gas passage; a second valve provided in the second gas passage; a first gas supply pipe for supplying a first gas to the recess; and a gas discharge pipe for discharging a gas from the recess. The first gas passage and the second gas passage are connected to the first gas supply pipe, or the first gas passage and the second gas passage are connected to the gas discharge pipe.