H01L21/32134

METHOD AND COMPOSITION FOR ETCHING MOLYBDENUM

An etchant composition and method for etching molybdenum from a microelectronic device at an etch rate are described. A microelectronic device is contacted with an etchant composition for a time sufficient to at least partially remove the molybdenum. The etchant composition comprises at least one oxidizing agent, at least one oxidizing agent stabilizer, and at least one base and has a pH of from 7.5 to 13. The etchant composition selectively removes molybdenum at an etch rate of 5-200 Å/min.

Method and composition for etching molybdenum

An etchant composition and method for etching molybdenum from a microelectronic device at an etch rate are described. A microelectronic device is contacted with an etchant composition for a time sufficient to at least partially remove the molybdenum. The etchant composition comprises at least one oxidizing agent, at least one oxidizing agent stabilizer, and at least one base and has a pH of from 7.5 to 13. The etchant composition selectively removes molybdenum at an etch rate of 5-200 Å/min.

Semiconductor device and method

An embodiment method includes: forming fins extending from a semiconductor substrate; depositing an inter-layer dielectric (ILD) layer on the fins; forming masking layers on the ILD layer; forming a cut mask on the masking layers, the cut mask including a first dielectric material, the cut mask having first openings exposing the masking layers, each of the first openings surrounded on all sides by the first dielectric material; forming a line mask on the cut mask and in the first openings, the line mask having slot openings, the slot openings exposing portions of the cut mask and portions of the masking layers, the slot openings being strips extending perpendicular to the fins; patterning the masking layers by etching the portions of the masking layers exposed by the first openings and the slot openings; and etching contact openings in the ILD layer using the patterned masking layers as an etching mask.

Efficient cleaning and etching of high aspect ratio structures

A method for treating a substrate includes arranging a substrate in a processing chamber. At least one of a vaporized solvent and a gas mixture including the solvent is supplied to the processing chamber to form a conformal liquid layer of the solvent on exposed surfaces of the substrate. The at least one of the vaporized solvent and the gas mixture is removed from the processing chamber. A reactive gas including a halogen species is supplied to the processing chamber. The conformal liquid layer adsorbs the reactive gas to form a reactive liquid layer that etches the exposed surfaces of the substrate.

Method of forming a semiconductor device

A method of forming a semiconductor device is disclosed. A substrate having a first device region and a second device region is provided. A metal nitride barrier layer is formed to cover the first device region and the second device region. A titanium layer is deposited on the metal nitride barrier layer. The titanium layer is selectively removed from the second device region, thereby exposing the metal nitride barrier layer in the second device region. The titanium layer in the first device region is transformed into a titanium nitride layer. The titanium nitride layer is a work function layer on the first device region.

Hydrogen Peroxide Decomposition Inhibitor
20220340814 · 2022-10-27 ·

The present invention addresses the problem of providing a decomposition inhibitor for inhibiting the decomposition of hydrogen peroxide included in an etching liquid composition for titanium nitride.

The present invention relates to a decomposition inhibitor that is used to inhibit the decomposition of hydrogen peroxide included in an etching liquid composition for titanium nitride and that includes at least one compound selected from among azole compounds, aminocarboxylic acid compounds, and phosphonic acid compounds as an active component.

PEROVSKITE/SILICON TANDEM PHOTOVOLTAIC DEVICE
20220344106 · 2022-10-27 ·

A tandem photovoltaic device includes a silicon photovoltaic cell having a silicon layer, a perovskite photovoltaic cell having a perovskite layer, and an intermediate layer between a rear side of the perovskite photovoltaic cell and a front (sunward) side of the silicon photovoltaic cell. The front side of the silicon layer has a textured surface, with a peak-to-valley height of structures in the textured surface of less than 1 μm or less than 2 μm. The textured surface is planarized by the intermediate layer or a layer of the perovskite photovoltaic cell. Forming the tandem photovoltaic device includes texturing a silicon containing layer of a silicon photovoltaic cell and operatively coupling a perovskite photovoltaic cell comprising a perovskite layer to the silicon photovoltaic cell, thereby forming a tandem photovoltaic device and planarizing the textured surface of the silicon containing layer of the silicon photovoltaic cell.

Electro-oxidative metal removal in through mask interconnect fabrication

In one implementation a cathode for electrochemical metal removal has a generally disc-shaped body and a plurality of channels in the generally disc-shaped body, where the channels are configured for passing electrolyte through the body of the cathode. The channels may be fitted with non-conductive (e.g., plastic) tubes that in some embodiments extend above the body of the cathode to a height of at least 1 cm. The cathode may also include a plurality of indentations at the edge to facilitate electrolyte flow at the edge of the cathode. In some embodiments the cathode includes a plurality of non-conductive fixation elements on a conductive surface of the cathode, where the fixation elements are attachable to one or more handles for removing the cathode from the electrochemical metal removal apparatus.

Integrated structures and methods of forming vertically-stacked memory cells

Some embodiments include a method of forming vertically-stacked memory cells. An opening is formed through a stack of alternating insulative and conductive levels. Cavities are formed to extend into the conductive levels. Regions of the insulative levels remain as ledges which separate adjacent cavities from one another. Material is removed from the ledges to thin the ledges, and then charge-blocking dielectric and charge-storage structures are formed within the cavities. Some embodiments include an integrated structure having a stack of alternating insulative levels and conductive levels. Cavities extend into the conductive levels. Ledges of the insulative levels separate adjacent cavities from one another. The ledges are thinned relative to regions of the insulative levels not encompassed by the ledges. Charge-blocking dielectric and charge-storage structures are within the cavities.

SUBSTRATE TREATMENT METHOD AND SUBSTRATE TREATMENT SYSTEM
20230077937 · 2023-03-16 ·

A substrate treatment method for treating a substrate, includes: applying a coating solution containing an organometallic complex, a solvent, and an additive to the substrate to form a solution film of the coating solution; heating the substrate on which the solution film of the coating solution has been formed, to form an organic constituent-containing metal oxide film being a metal oxide film containing an organic constituent contained in the additive; performing dry etching using the organic constituent-containing metal oxide film as a mask; removing the organic constituent in the organic constituent-containing metal oxide film after the dry etching; and removing, by wet etching, a film obtained by removing the organic constituent from the organic constituent-containing metal oxide film.