A semiconductor device and a method of forming the same are provided. A substrate is provided. A trench is formed in the substrate and a conductive material is formed filling the trench. A portion of the conductive material filling an upper portion of the trench is removed to expose an upper surface of the substrate and an upper corner and an upper sidewall of the trench. A doping process is performed to form a doped region in the substrate along the exposed upper surface of the substrate and the exposed upper corner and upper sidewall of the trench. The doped region has an upside-down L shape.

A device for manufacturing an array substrate includes an exposure device for using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate. A polysilicon pattern layer is disposed on the substrate. A gate insulation layer covers the polysilicon pattern layer. The photoresist pattern layer includes a hollow portion corresponding to a heavily doping region of the polysilicon pattern layer, a first photoresist portion corresponding to a lightly doping region of the polysilicon pattern layer, and a second photoresist portion corresponding to an undoped region of the polysilicon pattern layer. The first photoresist portion is thinner than the second photoresist portion. A doping device is used for performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region are formed simultaneously.

A method of forming an LTPS TFT substrate includes: Step 1: providing a substrate and depositing a buffer layer; Step 2: depositing an a-Si layer; Step 3: depositing and patterning a silicon oxide layer; Step 4: taking the silicon oxide layer as a photomask and annealing the a-Si layer with excimer laser, so that the a-Si layer crystalizes and turns into a poly-Si layer; Step 5: forming a first poly-Si region and a second poly-Si region; Step 6: defining a heavily N-doped area and a lightly N-doped area on the first and second poly-Si regions, and forming an LDD area; Step 7: depositing and patterning a gate insulating layer; Step 8: forming a first gate and a second gate; Step 9: forming via holes; and Step 10: forming a first source/drain and a second source/drain.

A method for manufacturing a semiconductor device exhibiting improved short channel effects and increased current driving ability is disclosed. The method includes the steps of: providing a substrate of a first conductivity-type, e.g., P-type; forming a gate insulating layer on the substrate; forming a gate electrode on the gate insulating layer; forming a gate cap insulating layer on the gate electrode; introducing inactive ions of the first conductivity-type into the first conductivity-type semiconductor substrate at both sides of the gate electrode, so as to form amorphous regions; forming first impurity regions of the first conductivity-type near the amorphous regions; and forming second impurity regions of a second conductivity-type, e.g., N-type, in the substrate at both sides of the gate electrode. The method also includes forming source and drain regions of the second conductivity-type in the substrate. The amorphous regions are formed by ion implantation of the inactive ions while the first and second impurity regions and the source and drain regions are formed by ion implantation of active ions. Inactive ions are ions which, after implantation into the amorphous regions, assume an atomic or molecular state in which they act neither as acceptors nor donors. Conversely, active ions act as acceptors or donors after implantation.