A semiconductor device includes a semiconductor layer made of SiC. A transistor element having an impurity region is formed in a front surface portion of the semiconductor layer. A first contact wiring is formed on a back surface portion of the semiconductor layer, and defines one electrode electrically connected to the transistor element. The first contact wiring has a first wiring layer forming an ohmic contact with the semiconductor layer without a silicide contact and a second wiring layer formed on the first wiring layer and having a resistivity lower than that of the first wiring layer.

The power circuit includes: a main substrate; a first electrode pattern disposed on the main substrate and connected to a positive-side power terminal P; a second electrode pattern disposed on a main substrate and connected to a negative-side power terminal N; a third electrode pattern disposed on the main substrate and connected to an output terminal O; a first MISFET Q1 of which a first drain is disposed on the first electrode pattern; a second MISFET Q4 of which a second drain is disposed on the third electrode pattern; a first control circuit (DG1) connected between a first gate G1 and a first source S1 of the first MISFET, and configured to control a current path conducted from the first source towards the first gate.

A method of manufacturing a semiconductor device that includes a semiconductor element. The method includes the steps of providing a semiconductor substrate of a first conductivity type, forming an element structure of the semiconductor element, at a first main surface of the semiconductor substrate, forming a first protective film at a second main surface of the semiconductor substrate, implanting ions in the semiconductor substrate from the second main surface having the first protective film formed thereon, and removing the first protective film.

A semiconductor device includes: a first conductivity-type semiconductor substrate; a second conductivity-type base region provided on a front surface side inside the semiconductor substrate, a gate trench portion provided inside the semiconductor substrate and penetrating the base region from a front surface of the semiconductor substrate, the gate trench portion having a gate conductive portion, and a dummy trench portion provided inside the semiconductor substrate and penetrating the base region from a front surface of the semiconductor substrate, the dummy trench portion including an upper dummy conductive portion having an emitter potential and a lower gate conductive portion positioned below the upper dummy conductive portion and having a gate potential, wherein the lower gate conductive portion of the dummy trench portion is connected to the gate conductive portion of the gate trench portion.

A semiconductor device includes trench structures that extend from a first surface into a semiconductor body. The trench structures include a gate structure and a contact structure that extends through the gate structure, respectively. Transistor mesas are between the trench structures. Each transistor mesa includes a body zone forming a first pn junction with a drift structure and a second pn junction with a source zone. Diode regions directly adjoin one of the contact structures form a third pn junction with the drift structure, respectively.

A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.0, a body region of the second conductivity type formed in a region of a surface layer portion of the first main surface of the semiconductor layer between the gate trench and the source trench, a source region of the first conductivity type formed in a surface layer portion of the body region, and a drain electrode connected to the second main surface of the semiconductor layer.

A semiconductor device includes a SiC body having a first surface, a gate trench extending from the first surface into the SiC body and having a first sidewall, a second sidewall opposite the first sidewall, and a bottom, a source region of a first conductivity type formed in the SiC body and adjoining the first sidewall of the gate trench, a drift region of the first conductivity type formed in the SiC body below the source region, a body region of a second conductivity type formed in the SiC body between the source region and the drift region and adjoining the first sidewall of the gate trench, and a diode region of the second conductivity type formed in the SiC body and adjoining the second sidewall and the bottom of the gate trench but not the first sidewall of the gate trench.

A semiconductor device includes: a first-conductivity-type drift layer including a first-conductivity-type impurity, vacancy-oxygen-hydrogen complex defects each caused by a vacancy, an oxygen atom, and a hydrogen atom, divacancy-and-vacancy-phosphorus complex defects, having a trap density level lower than a trap density level of the vacancy-oxygen-hydrogen complex defect, and third complex defects; a plurality of donor layers provided at different depths in a depth direction of the first-conductivity-type drift layer, wherein each of the plurality of donor layers includes donors caused by the vacancy-oxygen-hydrogen complex defects, and each of the plurality of donor layers has an impurity concentration distribution that includes a first portion with a maximum impurity concentration and a second portion with a concentration gradient in which the impurity concentration is reduced from the first portion to both main surfaces of the first-conductivity-type drift layer; and a second-conductivity-type semiconductor region provided on one main surface of the first-conductivity-type drift layer.

A semiconductor device includes: a semiconductor layer of a first conductive type having a first surface and a second surface opposite to the first surface; a body region of a second conductive type selectively formed on the first surface of the semiconductor layer; a source region of the first conductive type formed inside the body region; a gate electrode opposing part of the body region via a gate insulating film; a column layer of the second conductive type formed at the second surface side with respect to the body region; an embedded electrode embedded in the column layer such that the embedded electrode is electrically isolated from the column layer; and a first electrode electrically connected to the embedded electrode.

The present disclosure relates to a semiconductor device, and associated method of manufacture. The semiconductor device includes, MOSFET integrated with a p-n junction, the p-n junction arranged as a clamping diode across a source contact and a drain contact of the MOSFET. The MOSFET defines a first breakdown voltage and the clamping diode defines a second breakdown voltage, with the first breakdown voltage being greater than the second breakdown voltage so that the clamp diode is configured and arranged to receive a low avalanche current and the MOSFET is configured and arranged to receive a high avalanche current.