A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

A semiconductor module according to the present disclosure includes: an insulating substrate; a first conductor disposed on the insulating substrate; a second conductor disposed on the insulating substrate; a first semiconductor element disposed on the first conductor; a second semiconductor element disposed on the second conductor; a first busbar connected to the first conductor in a region between the first semiconductor element and the second semiconductor element; a second busbar connected to the second semiconductor element; and an output busbar connecting the first semiconductor element to the second conductor and connected to the second conductor in the region between the first semiconductor element and the second semiconductor element. The output busbar is disposed at least partially overlapping the first busbar, and in an overlap region between the output busbar and the first busbar, the output busbar is located above the first busbar.

A semiconductor device includes a first MOSFET and a first IGBT. A drain of the first MOSFET and a collector of the first IGBT are electrically connected to each other. A source of the first MOSFET and an emitter of the first IGBT are electrically connected to each other. An element withstand voltage of the first MOSFET is larger than an element withstand voltage of the first IGBT.

In semiconductor device, a substrate unit includes an insulating substrate, a first conductor substrate and a second conductor substrate which are disposed on one main surface of the insulating substrate and spaced apart from each other, and a third conductor substrate which is disposed on the other main surface opposite to the one main surface of the insulating substrate. A terminal is connected to a surface of a semiconductor element opposite to the first conductor substrate. The terminal extends from a region above the semiconductor element to a region above the second conductor substrate while being connected to the second conductor substrate. At least a part of the terminal, the substrate unit and the semiconductor element is sealed by a resin. The third conductor substrate is exposed from the resin.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

A semiconductor device includes an insulation substrate including a circuit pattern, semiconductor chips mounted on the circuit pattern, a wire connecting between the semiconductor chips and between the semiconductor chip and the circuit pattern, and a conductive material serving as a conductor formed integrally with the wire.

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.