A semiconductor package can include a semiconductor chip on a substrate inside the semiconductor package and an electrode pad spaced apart from the semiconductor chip on the substrate inside the semiconductor package. A wire can be inside the semiconductor package, to connect the electrode pad to the semiconductor chip and a barrier member can be on the substrate fencing-in the semiconductor chip, where the electrode pad and the wire can be in an interior portion of the substrate. A sealing material can be in the interior portion of the substrate fenced-in by the barrier member, where the sealing material covering the semiconductor chip, the electrode pad, and the wire.

A semiconductor device has a first semiconductor die stacked over a second semiconductor die which is mounted to a temporary carrier. A plurality of bumps is formed over an active surface of the first semiconductor die around a perimeter of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and carrier. A plurality of conductive vias is formed through the encapsulant around the first and second semiconductor die. A portion of the encapsulant and a portion of a back surface of the first and second semiconductor die is removed. An interconnect structure is formed over the encapsulant and the back surface of the first or second semiconductor die. The interconnect structure is electrically connected to the conductive vias. The carrier is removed. A heat sink or shielding layer can be formed over the encapsulant and first semiconductor die.

A light emitting device includes a printed circuit board (PCB) including a connection pad, a base substrate mounted on the PCB and including a pixel region and a pad region, light emitting structures arranged on the pixel region, a barrier rib structure disposed on the pixel region and disposed at a vertical level different from the light emitting structures, the barrier rib structure including barrier ribs connected with each other to define each of pixel spaces, a phosphor layer filling each pixel space, a dam structure surrounding the barrier rib structure, a pad disposed on the pad region and adjacent to at least one side of an outer boundary of the light emitting structures, a bonding wire connecting the connection pad to the pad, and a molding structure covering the pad, the connection pad, the bonding wire, and at least a portion of the dam structure.

A cap chip or high density reroute layer for use in a stacked microelectronic module. A first set of electrically conductive reroute layers are defined on a sacrificial substrate. One or more stud bump columns are defined on an exposed conducive pad on a conductive reroute layer. One or more active or passive electronic elements, or both may be electrically coupled to one or more exposed conductive pads. The layer is encapsulated in an encapsulant and the stud bump columns exposed by removing a portion of the encapsulant. A second set of electrically conductive reroute layers is defined on the layer and electrically coupled to the stud bumps. The sacrificial substrate is removed to provide a cap chip or reroute layer.

Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method includes forming a contact pad over a semiconductor device. A passivation material is formed over the contact pad. The passivation material has a thickness and is a type of material such that an electrical connection may be made to the contact pad through the passivation material.

A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.

Provided are a method of manufacturing a substrate for chip packages and a method of manufacturing a chip package, the method of manufacturing the substrate including: forming a lower adhesive layer in a lower part of an insulation film; forming an upper adhesive layer in an upper part of the insulation film to form a base material; forming via holes in the base material; and forming a circuit pattern layer on the upper adhesive layer, so it is effective to improve adhesion power between the molding resin and the insulation film at the time of manufacturing a chip package later.

An apparatus including a circuit structure including a device stratum; one or more electrically conductive interconnect levels on a first side of the device stratum and coupled to ones of the transistor devices; and a substrate including an electrically conductive through silicon via coupled to the one or more electrically conductive interconnect levels so that the one or more inter connect levels are between the through silicon via and the device stratum. A method including forming a plurality of transistor devices on a substrate, the plurality of transistor devices defining a device stratum; forming one or more interconnect levels on a first side of the device stratum; removing a portion of the substrate; and coupling a through silicon via to the one or more interconnect levels such that the one or more interconnect levels is disposed between the device stratum and the through silicon via.

The invention concerns a method for producing a flexible circuit for a chip card module. The invention consists of using conductive pads located on the same face of the module as the contacts intended to establish a connection with a card reader, in order to produce an electrical connection between an antenna and an electronic chip. The connections with conductive pads are located partly inside an encapsulation area and partly outside said encapsulation area and respectively to either side of same. The invention also relates to a flexible circuit for implementing this method.

A semiconductor device includes an electrical insulating layer with superior heat resistance, heat dissipation, and durability, and which is manufactured through a process with good cost performance and process performance. In a semiconductor device including a first substrate to which a semiconductor chip is mounted directly or indirectly, and a white insulating layer formed on a surface of the first substrate and functioning as a reflecting material, the semiconductor chip is an LED, at least the surface of the first substrate is made of a metal, and a stacked structure of the white insulating layer and a metal layer is formed by coating a liquid material, which contains SiO.sub.2 in the form of nanoparticles and a white inorganic pigment, over the surface of the first substrate and baking the coated liquid material.