A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.

Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A conductive structure is disposed on the conductive pad, and a passive device is also disposed on the conductive pad, wherein the passive device has a first portion located above the second passivation layer and a second portion passing through the second passivation layer. A solderability preservative film covers the first portion of the passive device, and an under bump metallurgy (UBM) layer covers the second portion of the passive device and a portion of the conductive structure.

The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A conductive structure is disposed on the conductive pad, and a passive device is also disposed on the conductive pad, wherein the passive device has a first portion located above the second passivation layer and a second portion passing through the second passivation layer. A solderability preservative film covers the first portion of the passive device, and an under bump metallurgy (UBM) layer covers the second portion of the passive device and a portion of the conductive structure.

A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal molded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal molded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal molded body. The forming of the power semiconductor contact structure is performed firstly by applying a layer of sintering material of locally varying thickness to either the metal molded body 2 or the substrate, followed by sintering together the contacting film 5 with the substrate 1 by using the properties of the layer of sintering material that are conducive to connection, the contacting film 5 being made to develop its distinct form to correspond to the varying thickness of the layer of sintering material 3a.

A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal molded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal molded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal molded body. The forming of the power semiconductor contact structure is performed firstly by applying a layer of sintering material of locally varying thickness to either the metal molded body 2 or the substrate, followed by sintering together the contacting film 5 with the substrate 1 by using the properties of the layer of sintering material that are conducive to connection, the contacting film 5 being made to develop its distinct form to correspond to the varying thickness of the layer of sintering material 3a.

A semiconductor device (100) comprising a leadframe (120) having an assembly pad (121) in a first horizontal plane (180), the pad's first surface (121a) with a semiconductor chip (110) attached; further a plurality of leads (122) in a parallel second horizontal plane (190) offset from the first plane in the direction of the attached chip, the leads having a third surface (122a) with bonding wires, and an opposite fourth surface (122b); a package (140) encapsulating leadframe, chip, and wires, the package having a fifth surface (140a) parallel to the first and second planes; a plurality of recess holes (150) in the package, each hole stretching from the fifth surface to the fourth surface of respective leads; and solder (160) filling the recess holes, the solder attached to the fourth lead surface and extending to the fifth package surface.

A semiconductor device (100) comprising a leadframe (120) having an assembly pad (121) in a first horizontal plane (180), the pad's first surface (121a) with a semiconductor chip (110) attached; further a plurality of leads (122) in a parallel second horizontal plane (190) offset from the first plane in the direction of the attached chip, the leads having a third surface (122a) with bonding wires, and an opposite fourth surface (122b); a package (140) encapsulating leadframe, chip, and wires, the package having a fifth surface (140a) parallel to the first and second planes; a plurality of recess holes (150) in the package, each hole stretching from the fifth surface to the fourth surface of respective leads; and solder (160) filling the recess holes, the solder attached to the fourth lead surface and extending to the fifth package surface.

A method includes forming a plurality of metal posts. The plurality of metal posts is interconnected to form a metal-post row by weak portions between neighboring ones of the plurality of metal posts. The weak portions include a same metal as the plurality of metal posts. A majority of each of the plurality of metal posts is separated from respective neighboring ones of the plurality of metal posts. An end portion of each of the plurality of metal posts is plated with a metal. The plurality of metal posts is disposed into a metal post-storage. The method further includes retrieving one of the metal posts from a metal-post storage, and bonding the one of the metal posts on a metal pad.