Patent classifications
Y10S977/943
METHOD OF SYNTHESIZING MAGNETITE/MAGHEMITE CORE/SHELL NANOPARTICLES
The method of synthesizing magnetite/maghemite core/shell nanoparticles is a modified co-precipitation method for producing iron oxide (Fe.sub.3O.sub.4/-Fe.sub.2O.sub.3) nanoparticles that allows for production of the Fe.sub.3O.sub.4/-Fe.sub.2O.sub.3 core/shell nanoparticles with a desired shell thickness ranging between about 1 nm to 5 nm for biomedical and data storage applications. Aqueous solutions of ferric and ferrous salts are mixed at room temperature and pH of the mixture is raised to 10. The mixture is then heated at 80 C. for different lengths of time at atmospheric pressure to adjust particle size, and the precipitate is dried at 120 C. in vacuum. Oxidation in an oxygen atmosphere for different lengths of time is used to adjust the thickness of the -Fe.sub.2O.sub.3 shell.
Memory cells having electrically conductive nanodots
Memory cells having electrically conductive nanodots between a charge storage material and a control gate are useful in non-volatile memory devices and electronic systems.
Optically Variable Data Storage Device
An optically variable device uses a data storage layer with a nano-optical bit system to store data. The optically variable device encodes the data using spectral signatures (such as colors) as variables. In some embodiments, the optically variable device uses angle multiplexing to store machine-readable data and an image. The optically variable device can be used as a secure data storage medium for a large volume of data. The storage capacity can be increased by increasing the number of color variables and by introducing additional variables such as intensity and polarization.
Semiconductor josephson junction and a transmon qubit related thereto
The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS
Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
Optically variable data storage device
An optically variable device uses a data storage layer with a nano-optical bit system to store data. The optically variable device encodes the data using spectral signatures (such as colors) as variables. In some embodiments, the optically variable device uses angle multiplexing to store machine-readable data and an image. The optically variable device can be used as a secure data storage medium for a large volume of data. The storage capacity can be increased by increasing the number of color variables and by introducing additional variables such as intensity and polarization.
Methods of forming nanotube films and articles
Nanotube films and articles and methods of making the same are disclosed. A conductive article or a substrate comprises at least two unaligned nanotubes extending substantially parallel to the substrate and each contacting end points of the article but each unaligned relative to the other, the nanotubes providing a conductive pathway within a predefined space.
Systems and methods for fabrication of superconducting integrated circuits
Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
Advanced processing apparatus
A processing element for an advanced processing apparatus. The processing element comprises a silicon-insulator interface and a confining arrangement for confining one or more quantum dots in the semiconductor. The processing element has also a control arrangement for controlling a quantum property of the one or more quantum dots and operate the one or more quantum dots as a qubit to perform quantum processing.
LOW POWER EMBEDDED ONE-TIME PROGRAMMABLE (OTP) STRUCTURES
Devices and methods for forming a device are presented. The method includes providing a substrate prepared with at least a first region for accommodating an anti-fuse based memory cell. A fin structure is formed in the first region. The fin structure includes top and bottom fin portions and includes channel and non-channel regions defined along the length of the fin structure. An isolation layer is formed on the substrate. The isolation layer has a top isolation surface disposed below a top fin surface, leaving the top fin portion exposed. At least a portion of the exposed top fin portion in the channel region is processed to form a sharpened tip profile at top of the fin. A gate having a gate dielectric and a metal gate electrode is formed over the substrate. The gate wraps around the channel region of the fin structure.